previous projects

Ph.D. Theses

  • NBTI in SRAM
    Behroz Afzal

  • Systematic Process Variation
    Hossein Aghababa

  • Low Power Cryptography Hardware Supporting Generic Parameters

    S.H.R. Ahmadi

  • Nanoscale Double Gate MOSFET Modeling

    S. Mohammadi

  • Power Reduction of Data Communication in Network On Chips (NoCs)

    M. Saneei


M.Sc. Theses


  • Design of digital circuits, resistant from process variation in nanotechnology

    N. Mozaffari

  • Simulation of High Concentration Solar Cells

    A. Alimardani

  • Optimization Design techniques for Digital Blocks in Nanotechnology Considering Process Variation effects
    A. R. Ahmadi_Mehr

  • Modeling of speed and power consumption variations in Nanotechnology
    M. Saremi

  • Techniques for reducing process variation effects in digital circuits in nanotechnology
    S. Kiamehr

  • Power Supply Noise Analysis in Nanotechnology Designs
    B. Bozorgzadeh

  • Device Modeling and Optimization of SRAM in Nanoscale Era
    B. Ebrahimi

  • Electro-thermal co-design

    S. Soleimani-Amiri

  • Power and Performance Survey and Optimization of Digital Circuits in sub-100nm Technology

    S. A. Sammak

  • Investigating and improving performance of Protocols for Wireless Sensor Network

    A. Salehpour

  • Analyzing and improving power consumption in Network-on-Chips (NoCs) and MultiProcessor-System on Chips (MPSoCs)
    A. M. Rahmani-Sane

  • Investigation and Modeling of Reliability Challenges and Gate Leakage Currents of the Nano-Devices
    N. Ghobadi

  • Ultra Low Power Design and Simulation in Integrated Circuits based on New Devices in Nanoscale Technologies
    F. Jazayeri

  • Improving Dynamic Power Management Techniques of Nanotechnology Digital Circuits using Dynamic Voltage Frequency Scaling

    M. Samadi

  • Improving Techniques for Reducing Process Variation Effects in Nanotechnology Integrated Circuits

    M. Rostami

  • Nanostructure Laser Modeling and Analysis for Inter-chip and Intra-chip Optical Communication Systems
    M.-A. Karami

  • Improving the Power Reduction Techniques for Reconfigurable Network On Chips
    M.-R. Binesh-Marvasti

  • Improving Techniques for DC to DC Converters
    E. Rokhsat-Yazdi

  • Techniques for Improving the Performance of Clock (and Data) Recovery/Generation Circuits
    H.-R. Zamani

  • Design and Optimization of the Performance of DSP Blocks in Nanotechnologies
    B. Eghbalkhah

  • Design and Optimization of Ultra Low-Power Circuits in CMOS Technologies
    V. Moallemi

  • Power and Leakage Reduction Techniques for VLSI Circuits in Sub-100nm Technologies
    F. Aezinia

  • Power Reduction of Dynamic Logic Circuits in Sub-100nm Technologies
    A.S. Seyedi

  • Low Power High Fan-in Logic Circuits in Sub-100nm Technologies
    B. Kheradmand

  • Improving the low power Methods in Network on Chips for Nanotechnologies
    M. Daneshtalab

  • Power Optimization of Network On Chips Using Efficient Routing Algorithms
    A. Sobhani

  • Design and Optimization of Various Layers in Network on Chips
    M. Nickray

  • Design and Optimization of Topologies and Communication Protocols in Network on Chips
    M. Dehyadegari

  • Investigation and Comparison of Asynchronous Circuits

    K. Shojaei

  • Power Reduction and Performance Improvement in sub-100nm Arithmetic Blocks

    A. AmirAbadi

  • Performance Improvement in sub-100nm Digital Signal Processing Circuits

    B. Afzal

  • Power Reduction in sub-100nm Digital Integrated Circuits

    J. Jaffari

  • Energy Reduction in System on Chips (SoCs) Circuits using Power Management

    A. Abbasian

  • Low Power Techniques in Built-in Self Test for VLSI Circuits

    S. H. Rasouli

  • Power Consumption Reduction in VLSI Circuits Using Double-Power Supply Techniques

    B. AmeliFard

  • Digital Sigma-Delta Modulators

    B. Bornoosh

  • Modeling of I-V Characteristics of SOI-MOSFET Valid in All Regions of Operation

    D. MotavaliZadeh

  • Investigation and Comparison of Asynchronous Pipelined Logic Structures

    M. Gholipour

  • Design and Simulation of Low-Power Pipeline A/D in CMOS Technology

    M. Ebrahimi

  • Design of Low Power Digital Systems Based on Adiabatic Switching Principles

    H. Mahmoodi-Meimand