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Group:
Device and Digital Group
Personal
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Born in April 1983, Tehran, Iran.
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Married.
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Education
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University of Tehran, Tehran, Iran |
2005 – present |
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M.S — Electrical and Computer Engineering - Circuits
and Systems
Advisor: Prof. Ali Afzali-Kusha
Thesis title: Dynamic
power management and voltage/frequency scaling in
nano-scale devices
GPA: 19.2/20.0 |
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Sharif University of Technology, Tehran, Iran
B.S. — Electrical Engineering
GPA: 16.5/20.0 |
2001 – 2005
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Honors
and Awards
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Ranked 40th in
the nationwide university entrance exam for graduate
studies, Iran |
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Ranked 52th
among 350,000 participants in the nationwide
university
entrance exam, Iran |
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Awarded the silver medal in the
National Computer Olympiad |
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Publications
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Power Management with Fuzzy Decision Support System
Mehrzad Samadi and Ali Afzali-Kusha
To appear in the
IEICE Electronics Express Journal |
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Power Management with Fuzzy Decision Support System
Mehrzad Samadi and Ali Afzali-Kusha
In Proc. of the 7th International
conference on ASIC (ASICON’07), pp. 73 - 77,
Oct. 2007 |
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Power Management by Brain Emotional Learning
Algorithm
Mehrzad Samadi, Ali Afzali-Kusha and Caro Lucas
In Proc. of the 7th International
conference on ASIC (ASICON’07), pp. 78 - 81,
Oct. 2007 |
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Skills
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Programming languages: Visual C++, MATLAB, Pascal
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Hardware description languages: VHDL, Verilog
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EDA Tools: Xilinx ISE, ModelSim, HSPICE
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SDH/PDH Networking (STM-1, E1, E3, E4)
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PCB design using Protel DXP
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Work Experiences
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University of Tehran, Tehran, Iran
Low Power High Performance Nanosystems Lab
Research Assistant |
Jan. 2006 – June 2008 |
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Pardis Novel Processing Technology Co., Tehran, Iran |
March 2006 – present |
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R&D Engineer
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Design and FPGA implementation of STM1
radio with low power 16 QAM, 4 QAM, 128 QAMTCM
encoder and decoder on a
Xilinx Virtex IV FPGA.
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Design and implementation of MPEG
Transport Stream Analyzer
on a Xilinx Virtex IV FPGA.
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Detect and locate errors in order to keep the
quality of service as high as possible.
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Generate a recorded Transport Stream for any
TS-input systems such as modulators and encoders.
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Web
based user interface
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Design and implementation of a Digital Video Broadcast
Transmitter (DVBT/H) on a Xilinx Spartan III FPGA.
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A high capacity OFDM modulator
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FFT
2K,4K,and 8K
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Guard Intervals 1/4, 1/8, 1/16, 1/32
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FEC
1/2, 2/3, 3/4, 5/6, 7/8
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Constellations QPSK, 16QAM, 64QAM
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Network mode MFN
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Inner interleave Native/ In depth (DVB-H
only)
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Channel Bandwidth 8MHz,7MHz,6MHz,5MHz
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TPS
signal DVB-T or DVB-H
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Design of Fast Ethernet board and implement the TCP/IP layers in
VHDL for 10/100/1000 Mbps Ethernet
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Sharif University of Technology
B.S project
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Design and
development of Image Watermarking algorithms |
Jan. 2005 - June 2005 |
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Eima Company, Tehran, Iran |
June. 2004 – Sept. 2004 |
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Intern
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Design and development of message
transformation in MMS server in linux
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Teaching
Experiences
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Teaching assistant for computer
programming course, Sharif University of Technology |
Fall 2002 |
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Teaching Pascal Programming to
High School Students |
2001 |
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Teaching Algorithms to High School
Students for Computer Olympiad |
2001 |
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Graduate Courses
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Advance VLSI
(University of Tehran, Iran)
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Low Power Circuits
(University of Tehran, Iran)
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Digital Signal Processing
(Sharif University of Technology,
Iran)
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Advanced Digital Communication
(Sharif University of Technology, Iran)
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Integrated Circuit Design
(University of Tehran, Iran)
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Language Proficient
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