Masoud Rostami

M.Sc. Student

 

rostamy@gmail.com

Tel: +98 912 6023289

 

Group: Digital Group

Thesis Title: Statistical Design of VLSI Systems to Overcome Process Variation Effects

 

Personal

  • Born in 1983, Tehran, Iran.

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Education

  • M  M.Sc (Electrical Engineering-Electronics), University of Tehran, Tehran, IRAN, Winter 2006 to present. GPA up to now : 16.4

 

  • B.Sc. (Electrical Engineering) University of Tehran, Tehran, IRAN, Fall 2001 to Fall 2005 Junior and Senior year GPA 17.5/20, Total GPA:16.74/20
  • High School Diploma (Mathematics and Physics stream), Alborz High School, Tehran, IRAN, 1997-2000, Cumulative GPA 19.45/20, Ranked second among 900 classmates in high school

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Honors

  • Ranked 100 in Iranian National Entrance exam June 2001.
  • Won a certificate for the best ECE Young Researcher of Tehran University by the president of ECE department "Professor Jabbehdar- Maralani", 2 March 2005..

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Publications

1.      M. Rostami, B. Ebrahimi, A. Afzali-Kusha, “ Failure Modeling and Yield Optimization of FINFET based SRAMs”, ICCCEE08, Malaysia, (Abstract Accepted)

2.      M. Azim-Karami, A. Afzali-Kusha, R. Faraji-Dana, M.Rostami “Quantitative Comparison of Optical and Electrical H, X, and Y clock Distribution Networks”, ISVLSI 2007, Porto Allegro, Brazil 2007

3.      M. R. Ghaderi, S. Hashemi, M. Rostamy,  “A Phase Noise Calculation (PNCAL) Toolbox for Digitally Controlled Oscillator Design”, 15th Iranian Conference on Electrical Engineering, Tehran, Iran 2007

4.      M. Rostami,  M. R. Ghaderi Karkani, Y. Mortazavi “Next Generation Lithography by Electron Beam Exposure”, First Annual Symposium of ECE Young Researchers, March 2, 2005, Tehran, Iran [This paper has been among the best papers in this Symposium and has been awarded]," To be submitted to ISVLSI.

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Skills and Experiences

  • FPGA Tool: Xilinx ISE
  • Circuit Simulators: HSpice
  • Digital Circuit Simulators: Modelsim
  • Mathematics Softwares: Matlab
  • Programming: C/C++, Assembly, VHDL, Borland C Builder (Expert!)
  • Microcontrollers: 8051
  • Synthesis Tool : Synplify (a little)
  • Other: Protel DXP (a little)

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Teaching Experiences

  • Electronics Lab II, Winter 2005
  • Electronics Lab  I,  Summer  2005
  • Microprocessors, Fall 2005

 

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Language Skills

  • GRE: Verbal: 490/800, Quantitative: 800/800 Writing: 2/6
  • TOEFL: 600/677 paper-based (Expired, Taking it again on January)

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Work Experiences

  • Pardis Novel Technologies: Lead Architect for Design and Industrial Implementation of a “DAB Ensemble Provider”. As a tender from IRIB, 2005-2006. It consists of base-band processing with Virtex IV Board and controlling the system using a PC based software.
  • Designing a board for decoding a MPEG2 Audio-Video stream, using Philips ASIC ICs
  • Helped install an SEM (scanning electron microscope) and was one of its operators for 6 months and tried to Change an SEM to an electron beam lithography system and got some good preliminary results (team work as summer internship) 

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