Farzan Jazayeri

M.Sc. Student

Farzan_Jazayeri@yahoo.com

f.jazayeri@ece.ut.ac.ir

Tel: +98 (912) 2792656

      +98(21) 66592340

 

 

Group: Circuits and Systems Design

 

Thesis Title: Design of low power and high performance integrated circuits based on novel devices in nano technologies.

 

Personal

Surname Jazayeri
Name Farzan
Gender Male
Marital Status Married
Nationality Iranian
Date of Birth August, 1982
Address No.3, Leila St., Eastern-Hoveyzeh St., Northern Sohrevardi Ave., Tehran, Iran
Phone

Mobile: +98(912)2792656

Home:  +98(21)66592340
Fax             +98(21)88745862
Homepage

http://nanolab.ut.ac.ir/FM/Jazayeri.htm

http://www.nano.ir/info/personal_info.php?id=12708

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Education

  • Fall 2006-Jan 2009: M.Sc., Circuits and Systems, Electronics, Electrical Engineering, University of Tehran, Tehran, Iran.

  • Thesis: Design of low-power and high performance integrated circuits based on novel devices in nano technologies. 

    GPA: 18.1/20

 

  • Fall 2001-2006: B.Sc., Electronics, Electrical Engineering, K.N.Toosi University of Technology, Tehran, Iran.

  • Thesis: Analysis and design antennas and impedance matching circuits in submillimeter wave detectors using Josephson fluxonic diode.

    Advisor: Prof. Farshid Raissi and Prof. M.S.Abrishamian  

 

  • Fall 2000-2001: Pre-University Certificate in Mathematics and Physics, Roshd High School, Tehran, Iran.

  • GPA: 19.9/20 (First Rank).

 

  • Fall 1997-2000: High School Diploma in Mathematics and Physics, Roshd High School, Tehran, Iran.

  • GPA: 20/20 (First Rank).

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Honors
  • Patents: F.Jazayeri, "A new method of optimizing and simulating for simple analog and digital circuits based on nano devices", Patent No.32/07437, Jun. 2009, Iran.
  • Ranked 6th among 24 M.Sc. students of the Electrical/Electronics engineering of the University of Tehran, class of 2007.
  • Ranked in 12th among more than 300,000 students in the B.Sc. entrance exam of Azad University in 2001.
  • Ranked 0.1 % among more than 550,000 students in the B.Sc. entrance exam in 2001.
  • Ranked 1st in the final pre-university exams in the city of Tehran in 2001.
  • Ranked 1st in the final high school exams in the city of Tehran in 2000.

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Publications

   Journal papers

  1. F.Jazayeri, B.Forouzandeh, and F.Raissi, "Low-power Variable Gain Amplifier with Wide UGBW Based on Nanoscale Field Effect Diode", IEICE Electronics Express, Vol.6, No.1 pp.51-57, January 2009, Japan.

  2. F.Jazayeri, F.Raissi, B.Forouzandeh, "Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET”, IEICE Electronics Express, Vol.7, No.1 pp.1-6, Japan, February 2010, Japan.

  3. F.Jazayeri, A.Sammak, and F.Raissi, B.Forouzandeh, "A novel ultra low-energy sub-threshold inverter based on nanoscale Field Effect Diode", has been accepted to IEICE Electronics Express, March, 2010, Japan.

  4. F.Jazayeri, B.Forouzandeh, F.Raissi, "Low-power Double Edge Triggered Flip-Flop based on nanoscale Field Effect Diode", has been submitted to IEICE Electronics Express, February, 2010, Japan. 

Conference papers

  1. F.Jazayeri, B.Forouzandeh, A.Jalili, A.Sammak, F.Raissi, "Nanoscale Field Effect Diode  as a High Frequency and Ultra Low-power Variable Gain Amplifier in AGC Circuits", in the Proceedings of the 20th IEEE International Conference on Microelectronics (ICM08), pp. 317-320, Dec. 2008, UAE.

  2. F.Jazayeri, S.Soleimani, B.Ebrahimi, F.Raissi, B.Forouzandeh, H.R.Ahmadi, "Pseudo-Linear Automatic Gain Control System Based on Nanoscale Field Effect Diode and SOI-MOSFET" , in the Proceedings of the 3rd IEEE International Design and Test Workshop (IDT08), pp. 154-58, Dec. 2008, Tunisia.

  3. F.Jazayeri and Ali-Afzali-Kusha, "Double Edge Triggered Feedback Flip-Flop Based on Independent Gate FinFETs in 32nm Technology", in the Proceedings of the 4th IEEE SPIE European International Symposium on Microtechnologies, May.2009, Germany. 

  4. F.Jazayeri and Ali-Afzali-Kusha, "High-Performance and Low-Power of Double Edge Triggered Flip-Flops with Feedback based on nanoscale FinFET Technologies", in the Proceedings of the International MultiConference of Engineers and Computer Scientists 2009 (IMECS 2009).

  5. F.Jazayeri and Zargar ershadi, "Advanced Engineering Mathematics and Methods to Solve PDEs with Matlab", in K.N.Toosi ECE Press, 2005, Iran.

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Skills and Experiences

  • Programming Languages:  MATLAB, Verilog HDL, VHDL, C++, Visual Basic, 80592/80196/8051/AVR Assembly Languages.
  • CAD Tools: HSPICE, PSPICE, ORCAD, Microwave Office, PiscesIIB, Mdraw, Dessis, ModelSim, Protel, AutoCAD.
  • Operating Systems and Microsoft Office: Windows, MS-DOS, Word, Power Point, Excel, Front-Page.

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Research Interests

  • Working on silicon nanowires, carbon nanotubes, nano-fabrication technologies, nanoscale semiconductor devices (DGMOS, FinFET, nano scale Field Effect Diode) which have superior characteristics compared to regular MOS transistors at device lengths below 80 nm.
  • Low-Power and high Performance VLSI circuits and systems based on nano scale semiconductor devices.
  • Power estimation and optimization techniques in Low-Power latches and Flip Flops.
  • Superconductivity, Soliton transistor, Submillimeter wave detection using Josephson fluxonic diode.
  • Optical transistors and phototonic crystals.

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M.Sc. Courses

  • Low-Power Integrated Circuits.
  • Custom Implementation of DSP systems.
  • Nano Devices and Their Integration.
  • Semiconductor Devices.
  • Modern MOS Technology.
  • Analog Integrated Circuits Design.
  • Opto-Electronic.
  • SOI Devices and Circuits.

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Research Experience

Research Assistant, Low-Power, High-Performance, Nano-Systems Laboratory

  • Performance estimation of digital circuits using circuit simulators and comparison different proposed low-power logic styles.

  • Advanced MOSFET, nano scale SOI and FED devices modeling.

  • Using nano scale Field Effect Diode in ultra Low-Power and high performance digital and analog designs (Variable Gain Amplifiers in AGC systems).

  • High performance and Low-Power of Double Edge Triggered Flip-Flops based on nano scale FinFET technologies.

  • Advanced MOSFET I-V Modeling.

  • Standard cell layout design and characterization.

  • Modification gate leakage model parameters of Predictive Technology Models (PTMs).

  • Submillimeter wave detection using Josephson fluxonic diode.

  • Implementing of DCT, DST and Gabor transformation on Programmable Function Arrays.

  • Verilog modeling of digital filters and FFT engines.

  • Worked on Controller Area Network (CAN).

  • MATLAB and Simulink system level modeling and computer simulations.

  • Analysis and measurement of signal distortion in RF application.

  • Mapping of DSP algorithms on Field Programmable Function Arrays.

  • Designing Patch and dipolar Antennas & impedance matching circuits design based on superconductor antennas.

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Course Presentations

  • ˝Mapping of DSP algorithms on Field Programmable Function Arrays, ˝ Presentation in Custom Implementation of DSP Systems Course, University of Tehran, June 2007.

  • ˝Analysis and measurement of signal distortion in RF application, ˝ Presentation in Analog Integrated Circuits Design Course, University of Tehran, Dec. 2006.

  • ˝Sub Millimeter wave detectors, ˝ Presentation in Semiconductor Devices Course, University of Tehran, Dec. 2006.

  • ˝Optical transistors and photonic crystals, ˝ Presentation in Opto-Electronic Course, University of Tehran, September 2007.

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Teaching Experiences

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Professional Experiences

  • Samim Rayaneh Company (Jun 2009-Present)

           Working as a software and hardware team programmer and contributing in the design, development and test of  broadcast (SD, HD, 3G) systems.     

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Memberships

  • IEEE Student Member.
  • Member of IEEE Circuits and Systems Society.
  • Member of IEEE Communications Society.
  • Member of IEEE Computer Society.
    •
  • Member of IEEE Electron Devices.
  • Member of IEEE Laser and Electro-Optics Society.
    •
  • Member of IEEE Signal Processing Society.
  • Member of IEEE Solid-State Circuits Society.

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Language Proficiency

National Languages: Native speaker Persian, Fluent in English and familiar with Arabic.

TOEFL: (PBT) 560

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References

 Prof. Farshid Raissi

Associate Professor

K.N.Toosi university

raissi@kntu.ac.ir

 Prof. M.S.Abrishamian

Associate Professor

K.N.Toosi university

msabrish@eetd.kntu.ac.ir

 Prof. B. Forouzandeh

Assistant Professor

University of Tehran

bforooz@ut.ac.ir
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