Sayyed HamidReza Ahmadi

Ph.D. Graduate of UT

 

hrahmadi@ut.ac.ir , shr_a@hotmail.com

Tel: +98 912 6053505

 

Personal

  • Born in 1977, Tehran, Iran.
  • Married Since 1999.

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Education

  • 2008-2011: Ph.D. Degree in Computer Engineering, University of Tehran, Tehran, Iran.
  • Ph.D. Thesis title: “Low-Power Hardware Implementation for Elliptic-Curve Cryptography”

 
  • 2005-2007: Ph.D. Student in Computer Engineering, University of Tehran, Tehran, Iran, GPA 18.67/20.
 
  • 1999-2001: M.Sc. Degree in Electrical and Electronics Engineering, University of Tehran, Tehran, Iran, GPA 18.15/20 (Ranked No. 1 among Electronics Eng. students).
  • M.Sc. Thesis title: “Design of Very High-speed Folding and Interpolating Analog-to-Digital Converters in CMOS”

  • Thesis Supervisor: Dr. Omid Shoaei

  • Passed courses on VHDL and VerilogHDL

  • Designed an FIR filter from VHDL coding to final layout

  • Developed a full-functional synthesizable PAR-1 processor

 
  • 1995-1998: B.Sc. Degree in Electrical and Electronics Engineering, University of Tehran, Tehran, Iran, GPA 18.65/20 (Ranked No. 1 among all Elec. Eng. students).
  • Worked on a mixed analog-digital electronic kit for power measurements, Which included working with Intel’s 80C196 micro-controller.

  • Passed courses on Intel’s 80x86 and Motorola’s MIPS R3000 m-processors

 
  • 1994: High School Diploma of Physics and Mathematics, Alavi High School, Tehran, Iran, GPA 19.44/20.
  • Ranked No. 2 in the university entrance exams (Konkoor - 1994) among more than 300,000

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Honors

  • 1998, Ranked No. 1 among all Electrical Engineering students of the university of Tehran.
  • 1994, Ranked No. 2 in the university entrance exams (nation-wide) among more than 300,000.

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Publications

Journal Publications

  • H. R. Ahmadi, A. Afzali-Kusha, and M. Pedram, "A Power-Optimized Low-Energy Elliptic-Curve Crypto-processor”, IEICE Electronics Express, Vol. 7, No. 23, pp.1752-1759, Dec. 2010.
  • H. R. Ahmadi, and A. Afzali-Kusha, "A Low-Power and Low-Energy Flexible GF(p) ECC Processor," Journal of Zhejiang University - Science C, vol. 11, no. 9, pp. 724-736, Sep 2010.

Conference Papers

  • H. R. Ahmadi, and A. Afzali-Kusha, "Low-Power Low-Energy Prime-Field ECC Processor Based on Montgomery Modular Inverse Algorithm," in Proceedings of 12th Euromicro Conference on Digital System Design, Patras, Greece on Aug. 27-29, 2009, pp. 817-822.
  • H. R. Ahmadi, and A. Afzali-Kusha, "Very Low-Power Flexible GF(p) Elliptic-Curve Crypto-Processor for Non-Time-Critical Applications," in Proceedings of 2009 IEEE International Symposium on Circuits and Systems, Taipei, Taiwan on May 24-27, 2009, pp. 904-907.
  • H. R. Ahmadi, and A. Afzali-Kusha, "Low-Power Flexible GF(p) Elliptic-Curve Cryptography Processor," in Proceedings of 3rd International Design and Test Workshop, Monastir, Tunisia on Dec. 20-22, 2008, pp. 182-186.
  • S. Hamid R. Ahmadi, and Omid Shoaei, "150 MS/s, 8-bits, Folding and Interpolating ADC in 0.25μm CMOS using Averaging", SCS, 2003.
  • N. Khosropour, S. Hamid Reza Ahmadi, and S.M. Atarodi, "A DSP Core for Telecommunication Applications," Eurasia, ICT, 2002.
  • B. Nejati, S. Hamid R Ahmadi, and Omid Shoaei, "Effect of Radix<2 on the Performance of Pipelined Analog-to-Digital Converters," SCS, 2001.

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Skills and Experiences

  • Extensive experience in VHDL- and VerilogHDL-based hardware design (both for modeling and synthesis)

  • Experience in high-level VHDL-based modeling of systems

  • Extensive experience in the area of FPGA-based hardware implementation, working with FPGA-based minimum systems and using FPGAs in other systems

  • Experience in digital hardware optimization for special applications

  • Experience in digital ASIC synthesis

  • Experience in Analog and Mixed-signal circuits design (integrated & board-level)

  • Experience in the design of electronic circuits for use in Telephony Applications

  • Experience in PCB design and laboratory testing of digital and analog circuits

  • Experience in C++ programming and ASSEMBLY code developing

  • Experience in many CAD tools:

  • "FPGA Advantage", "Modelsim", "Leonardo Spectrum", "MaxPlus+", "Quartus", "Xilinx ISE", "Xilinx EDK".

  • "HSpice", "Tanner LEdit", "Protel", "SYNOPSYS Design Analyzer", etc.

  • Working on SUN Microsystems's SOLARIS workstations

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Industrial Experiences

  • V. S. Co., Tehran branch (2000-2001)

  • Participated in the design of a pipelined analog-to-digital converter (8-bits, 50 MS/s) in 0.25µ CMOS to be used in a SOC application.

  • Design of a digital calibration block for the same pipelined ADC (HDL coded in VHDL).

  • This ADC was fabricated and worked in the SOC.

  • Emad Semicon Co. (2001-2005)

  • Participated in the development of a DSP core based on the Motorola's 24-bit 56300 series processors (HDL coded in Verilog)

  • Design and optimization of an ASIC based on Intel's 8051 micro-controller, dedicated to communication applications

  • This ASIC was fabricated in both 0.5µ & 0.25µ CMOS

  • The final product is used in a Telephone Central Switching System.

  • Also designed the testing algorithm and PCB and performed laboratory tests

  • Implementation and testing of many digital designs in ALTERA's FPGA cores

  • Participated in an "IC Layout Modification" procedure to introduce a special analog circuit into an already-fabricated digital IC

  • The resulting chip was fabricated and worked as desired.

  • Others

  • Participated in the development of a DVBH Receiver Mixed-Signal ASIC Chip

  • Participated in the development and testing of a standard PCI-Express Interface Core

  • Participated in the development of board-level Electronic circuits for use in Telephony Systems

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