

ALi
AfzaliKusha
Publications
Book Chapter:

X.
Zhang, A.
AfzaliKushaa, T.B. Norris, G.I. Haddad, and J.P.
Sung “Investigations Towards FarInfrared (THz) Lasers
Based on Quantum Wells” in Long Wavelength Emitters
Based on Quantum Wells and Superlattices, Gordon & Beach
Publishers, 1999.
Journals:

O. Akbari, M. Kamal, A. AfzaliKusha, and M. Pedram, “DualQuality 4:2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers,” Accepted for publication in IEEE Transactions on Very Large Scale Integration Systems(TVLSI), December 2016.

O. Akbari, M. Kamal, A. AfzaliKusha, and M. Pedram, “RAPCLA: A Reconfigurable Approximate Carry LookAhead Adder,” Accepted for publication in the IEEE Transactions on Circuits and Systems II: Express Briefs, November 2016.

M. Bahadori, M. Kamal, A. AfzaliKusha, and M. Pedram, “An Energy and Area Efficient yet HighSpeed SquareRoot Carry Select Adder Structure,” Computers and Electrical Engineering, vol. 58, February 2017, pp. 101–112.

M. Hemmat, M. Kamal, A. AfzaliKusha, and M. Pedram, “Hybrid TFETMOSFET Circuit: A Solution to Design SoftError Resilient UltraLow Power Digital Circuit,” Integration, the VLSI Journal, vol. 57, January 2017, pp. 11–19.

M. Bahadori, M. Kamal, A. AfzaliKusha, Y. Afsharnezhad, and E. Zahraie Salehi “CLCPA: A Hybrid CarryLookahead/CarryPropagate Adder for LowPower or HighPerformance Operation Mode,” Integration, the VLSI Journal, vol. 57, January 2017, pp. 62–68.

R. Zendegani, M. Kamal, M. Bahadori, A. AfzaliKusha, and Massoud Pedram, “RoBA Multiplier: A RoundingBased Approximate Multiplier for HighSpeed yet EnergyEfficient Digital Signal Processing,” Accepted for publication in IEEE Transactions on Very Large Scale Integration Systems(TVLSI), July 2016, DOI: 10.1109/TVLSI.2016.2587696.

K. Mehrabi, B. Ebrahimi, R. Yarmand, A. AfzaliKusha, and H. Mahmoodi, “Read static noise margin aging model considering SBD and BTI effects for FinFET SRAMs,” Microelectronics Reliability, vol. 65, October 2016, pp. 20–26.

M. Hemmat, M. Kamal, A. AfzaliKusha, and M. Pedram, “Study On the Impact of Device Parameter Variations on Performance of IIIV Homojunction and Heterojunction Tunnel FETs”, SolidState Electronics, vol. 124, October 2016, pp. 46–53.

H. AhmadiBalef, M. Kamal, A. AfzaliKusha, and M. Pedram, “AllRegion Statistical Model for Delay Variation based on LogSkewNormal Distribution,” IEEE Transactions on ComputerAided Design, vol. 35, September 2016, pp. 15031508.

M. Kamal, Q. Xie, M. Pedram, A. AfzaliKusha, and S. Safari “An Efficient Temperature Dependent Hot Carrier Injection Reliability Simulation Flow," Microelectronics Reliability, vol. 57, February 2016, pp. 10–19.

M. Bahadori, M. Kamal, ,A. AfzaliKusha, and M. Pedram, “A Comparative Study on Performance and Reliability of 32bit Binary Adders,” Integration, the VLSI Journal, vol. 53, March 2016, pp. 54–67.

N. Ghobadi and A. AfzaliKusha, “Investigation and modeling of negative bias temperature instability (NBTI) and hot carrier injection (HCI) in nanometer multigate devices,” Iranian Journal of Electrical and Electronics Engineering, vol. 12, no. 2, Fall 2015, pp. 114 (in Persian).

M. Kamal, A. AfzaliKusha, S. Safari, and M. Pedram, “Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions,” ACM Transactions on Design and Automation of Electronics Systems (TODAES), vol. 21, January 2016, pp. 28:128:25.

N. Jafarzadeh, M. Palesi, S. Eskandari, S. Hessabi, and A. AfzaliKusha, “Low Energy yet Reliable Data Communication Scheme for Networks on Chip,” Accepted for the publication in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 34, no. 12, December 2015, pp. 1892 – 1904, DOI: 10.1109/TCAD.2015.2440311.

M. Bahadori, M. Kamal, A. AfzaliKusha, and M. Pedram, “HighSpeed and EnergyEfficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels,” Accepted for the publication in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 2, February 2016, pp. 421433, DOI:10.1109/TVLSI.2015.2405133.

B. Ebrahimi, R. Asadpour, A. AfzaliKusha, and M. Pedram, “A FinFET SRAM cell design with BTI robustness at high supply voltages and high yield at low supply voltages,” International Journal of Circuit Theory and Applications, vol. 43, no. 12, pp. 2011–2024, December 2015, DOI: 10.1002/cta.2057.

M. Nejat, B. Alizadeh, and A. AfzaliKusha, “Dynamic FlipFlop Conversion: A TimeBorrowing Method for Performance,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 11, November 2015, pp. 2724–2727DOI:10.1109/TVLSI.2014.2366918.

M. Kamal, A. AfzaliKusha, S. Safari, and M. Pedram, “OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration,” ACM Transactions on Embedded Computing Systems (TECS), vol. 14, no. 4, September 2015, Article No. 72.

B. Eghbalkhah, M. Kamal, H. AfzaliKusha, A. AfzaliKusha, M. B. GhaznaviGhoushchi, and M. Pedram, “Workload and Temperature Dependent Evaluation of BTIInduced Lifetime Degradation in Digital Circuits,” Microelectronics Reliability, vol. 55, issue 8, July 2015, pp. 1152–1162.

V. Akhlaghi, M. Kamal, A. AfzaliKusha, and M. Pedram, “An Efficient Network onChip Architecture Based on Isolating Local and nonLocal Communications,” Computers & Electrical Engineering, Available online 19 December 2014, doi:10.1016/j.compeleceng.2014.12.002. vol. 45, July 2015, pp. 430444.

M. Ansari, H. AfzaliKusha, B. Ebrahimi, Z. Navabi, A. AfzaliKusha, and M. Pedram, "A NearThreshold 7T SRAM Cell with High Write and Read Margins and Low Write Time for Sub20 nm FinFET Technologies," Integration, the VLSI Journal, vol. 50, June 2015, pp. 91–106.

M. Nickray and A. AfzaliKusha, “Simultaneous Power Control and Power Management algorithm with Sectorshaped Topology for Wireless Sensor Networks,” EURASIP Journal on Wireless Communication and Networking, April 2015, 2015:118, doi:10.1186/s1363801503559.

M. Kamal, A. AfzaliKusha, S. Safari, and M. Pedram, “Design of NBTIResilient Extensible Processors,” The VLSI Journal of Integration, vol. 49, March 2015, pp. 22–34, http://dx.doi.org/10.1016/j.vlsi.2014.12.001.

H.R. Ahmadi, A. AfzaliKusha, M. Pedram, and M. Mosaffa, “A Flexible, PrimeField, Genus 2 HyperellipticCurve Cryptography Processor with Low Power Consumption and Uniform Power Draw,” Electronics and Telecommunications Research Institute (ETRI), vol. 37, no. 1, February 2015, pp. 107–117, http://dx.doi.org/10.4218/etrij.15.0114.0418.

B. Eghbalkhah, M. Kamal, A. AfzaliKusha, M. B. GhaznaviGhoushchi, and M. Pedram, “CSAM: A Clock Skewaware Aging Mitigation Technique,” Microelectronics Reliability, vol. 55, issue 1, January 2015, pp. 282–290.

B. Ebrahimi, A. AfzaliKusha, and H. Mahmoodi, “Robust FinFET SRAM design based on dynamic backgate voltage adjustment,” Microelectronics Reliability, vol. 54, issue 11, November 2014, pp. 2604–2612.

A. Yazdanbakhsh, M. Kamal, S.M. Fakhraie, A. AfzaliKusha, S. Safari, and M. Pedram, “Implementationaware selection of the custom instruction set for extensible processors,” Microprocessors and Microsystems, vol. 38, issue 7, October 2014, pp. 681–691.

M. Kamal, A. AfzaliKusha, S. Safari, and M. Pedram, “Impact of ProcessVariations on Speedup and Maximum Achievable Frequency of Extensible Processors,” ACM Journal of Emerging Technologies, vol. 10, issue 3, April 2014, article no. 19.

N. Jafarzadeh, M. Palesi, A. Khademzadeh, and A. AfzaliKusha, “Data Encoding Techniques for Reducing Energy Consumption in Networks on Chip,” Accepted for Publication in IEEE Transactions on Very Large Scale Integrated Circuits, vol. 22, no. 3, March 2014, pp. 675685.

M. Kamal, A. Yazdanbakhsh, H. Noori, A. AfzaliKusha, and M. Pedram, “A New Merit Function for Custom Instruction Selection under an Area Budget Constraint,” Design Automation for Embedded Systems, September 2013, DOI 10.1007/s1061701391172, vol. 17, Issue 1, pp 125.

M. Kamal, A.
AfzaliKusha, S. Safari, and M. Pedram, “Considering
the Effect of Process Variations during the ISA
Extension Design Flow”, Microprocessors and Microsystems, vol. 37, no. 67, August–October 2013, pp. 713–724.

B. Afzal, A.
AfzaliKusha, and M. Pedram, “An analytical model for read static noise margin including soft oxide breakdown, negative and positive bias temperature instabilities,” Microelectronics Reliability, vol. 53, no. 5, May 2013, pp. 670675.

B. Afzal, B. Ebrahimi, A.
AfzaliKusha, and H. Mahmoodi, “Analytical Modeling of
Read Margin Probability Distribution Function of SRAM
Cells in Presence of Process Variations and NBTI
Effect,” Japanese Journal of Applied Physics, vol. 51, no. 11, November 2012, 114301–1:9.

S. Mohammadi, A.
AfzaliKusha, and S. Mohammadi, “Performance
Improvement of Partially SilicononInsulator Lateral
DoubleDiffused Metal Oxide Semiconductor Field Effect
Transistors Using DopingEngineered Drift Region,”
Japanese Journal of Applied Physics, vol. 51, no. 10, October 2012, pp. 101201–1:6.

B. Afzal, B. Ebrahimi,
A. AfzaliKusha, and H. Mahmoodi “Modeling read SNM
considering both soft oxide breakdown and negative bias
temperature instability” Microelectronics Reliability, vol. 52, no. 12, December 2012, pp. 29482954.

H. Aghababa, A. Khosropour,
A. AfzaliKusha, B. Forouzandeh, and M. Pedram,
“Statistical Estimation of Leakage Power Dissipation in
NanoScale CMOS Digital Circuits using Generalized
Extreme Value Distribution,” IET Circuits, Devices & Systems, vol. 6, no. 5, September 2012, pp. 273278.

H. Aghababa, B. Ebrahimi,
A. AfzaliKusha, and M. Pedram, “Probability
calculation of read failures in nanoscaled SRAM cells
under process variations,” Microelectronics Reliability,
vol. 52, no. 11, 2012, pp. 2805281.

B. Afzal, B. Ebrahimi,
A. AfzaliKusha, and S. Mohammadi “Calculation of
onstate I–V characteristics of LDMOSFETs based on an
accurate LDD resistance modeling,” Superlattices and
Microstructures, vol. 52, no. 3, September 2012, pp.
560–576.

G. Rostami, M. Shahabadi,
A. Afzali Kusha, and A. Rostami, “Nanoscale
alloptical plasmonic switching using
electromagnetically induced transparency,” Applied
Optics, vol. 51, no. 21, July 2012, pp. 50195027.

M. Tinati, A. Khademzadeh,
A. AfzaliKusha, M. Janidarmian, “HACS: A novel
cost aware paradigm promising fault tolerance on
meshbased network on chip architecture,” Computers &
Electrical Engineering, vol. 38, no. 4, July 2012, pp.
963974.

M. Saremi, A.
AfzaliKusha, and S. Mohammadi, “Ground plane
finshaped field effect transistor (GPFinFET): A FinFET
for low leakage power circuits”, Microelectronic
Engineering, vol. 95, July 2012, pp. 7482.

H. Aghababa, B. Forouzandeh,
and A. AfzaliKusha, “Highperformance
lowleakage regions of nanoscaled CMOS digital gates
under variations of threshold voltage and mobility,”
Journal of Zhejiang University  Science C, vol. 13, no.
6, June 2012, pp. 460471.

M. Nickray, A.
AfzaliKusha, and R. Jäntti, “MEA: an energy
efficient algorithm for dense sectorbased wireless
sensor networks,” EURASIP Journal on Wireless
Communication and Networking, no. 85, March 2012, pp.
113.

B. Ebrahimi, B. Afzal,
A. AfzaliKusha, and S. Mohammadi “A RESURF LDMOSFET
with a dummy gate on partial SOI,” Journal of the Korean
Physical Society, vol. 60, no. 5, March 2012, pp.
842848.

M. Daneshtalab, M. Kamali,
M. Ebrahimi, S. Mohammadi, A. AfzaliKusha, and
J. Plosila, “Adaptive InputOutput Selection Based
OnChip Router Architecture” Journal of Low Power
Electronics, vol. 8, no. 1, February 2012, pp. 1129.

G. Rostami, M. Shahabadi,
A. AfzaliKusha, and A. Rostami, “EIT based
tunable metal composite spherical nanoparticles,”
Photonics and Nanostructures – Fundamentals and
Applications, vol. 10, no. 1, January 2012, 102–111.

B. Afzal. B. Ebrahimi,
A. AfzaliKusha, and M. Pedram, “An accurate
analytical IV odel for sub90nm MOSFETs and its
application to read SNM modeling,” Journal of Zhejiang
UniversitySCIENCE C (Computer & Electronics), vol. 13,
no. 1, January 2012, pp. 5870.

M. Saremi, B. Ebrahimi,
A. AfzaliKusha, and S. Mohammadi “A partialSOI
LDMOSFET with triangular buriedoxide for breakdown
voltage improvement” Microelectronics Reliability, vol.
51, no. 12, December 2011, pp. 20692076.

S. Mohammadi, A.
AfzaliKusha, and S. Mohammadi, “Drain current model
for strainedSi/Si1−xGex/strainedSi doublegate MOSFETs
including quantum effects,” Semiconductor Science and
Technology, vol. 26, no. 9, September 2011, 095022 doi:
10.1088/02681242/26/9/095022.

H. Aghababa, R. Asadpour,
A. AfzaliKusha, and B. Forouzandeh “Finding
optimum value of numerical aperture for the best aerial
image quality,” IEICE Electronics Express, December
2011, vol. 8, no. 11, pp. 879–883.

B. Ebrahimi, M. Rostami,
A. AfzaliKusha, and M. Pedram, “Statistical Design
Optimization of FinFET SRAM Using BackGate Voltage”
IEEE Transactions on Very Large Scale Integrated
Circuits, vol. 19, no. 10, October 2011, pp. 19111916.

M. E. Salehi, M. Samadi, M.
Najibi, A. AfzaliKusha, M. Pedram, S. M.
Fakhraie, “Dynamic Voltage and Frequency Scheduling for
Embedded Processors Considering Power and Timing
Constraints” IEEE Transactions on Very Large Scale
Integrated Circuits, vol. 19, no. 10, October 2011, pp.
19311935.

P. LotfiKamran, A.M.
Rahmani, A.A. Salehpour, A. AfzaliKusha, and Z.
Navabi, “Dynamic Power Reduction of Stalls in Pipeline
Architecture Processors,” International Journal of
Design, Analysis and Tools for Integrated Circuits and
Systems, vol. 1, no. 1, pp. 915, June 2011.

S. Mohammadi, A.
AfzaliKusha, and S. Mohammadi, “Compact Modeling of
Short Channel Effects in Symmetric and Asymmetric
3T/4T Double Gate MOSFETs” Microelectronics
Reliability, vol. 51, no. 3, March. 2011, pp. 543549.

H. R.
Ahmadi, A. AfzaliKusha, and M. Pedram, "A
PowerOptimized LowEnergy EllipticCurve
Cryptoprocessor”, IEICE Electronics Express,
Vol. 7, No. 23, pp.17521759, Dec. 2010.

H. R.
Ahmadi, and A. AfzaliKusha, "A LowPower and
LowEnergy Flexible GF(p) ECC Processor," Journal of
Zhejiang University  Science C, vol. 11, no. 9, pp.
724736, Sep 2010.

P. LotfiKamran, A.M.
Rahmani, M. Daneshtalab, A. AfzaliKusha, and Z.
Navabi, “EDXY  A Smart CongestionAware and Link
Failure Tolerant Routing Algorithm for
NetworkonChips,” Journal of Systems Architecture, vol.
56, no. 7, 2010, pp. 256264.

E.
RokhsatYazdi, A. AfzaliKusha, and M. Pedram, “A
HighEfficiency, Auto ModeHop,VariableVoltage, Ripple
Control Buck Converter,” Journal of Power Electronics,
vol. 10, no. 2, March 2010, pp. 115124.

S. Mohammadi
and A. AfzaliKusha, “Modeling of drain current,
capacitance and transconductance in thin film undoped
symmetric DG MOSFETs including quantum effects,”
Microelectronics Reliability, vol. 50, no. 3, March
2010, pp. 338345.

S. Mohammadi
and A. AfzaliKusha, “An
Efficient QuantumBased Model for the Threshold Voltage
of Thin Film Double Gate/Silicon on Insulator Silicon
Metal Oxide Semiconductor Field Effect Transistors,”
Japanese Journal of Applied Physics, vol. 49, no. 2,
March 2010, pp. 0243040243048.

A.M. Rahmani, A.
AfzaliKusha, and M. Pedram, “A Novel Synthetic
Traffic Pattern for Power/Performance Analysis of
NetworkonChips Using Negative Exponential
Distribution,” Journal of Low Power Electronics, vol. 5,
no. 3, October 2009, pp. 396405.

A.M. Rahmani, M.
Daneshtalab, A. AfzaliKusha, and M. Pedram,
“ForecastingBased Dynamic Virtual Channel Management
for Power Reduction in NetworkonChips,” Journal of Low
Power Electronics, vol. 5, no. 3, October 2009, pp.
385395.

G. Razavipour, A.
AfzaliKusha, and M. Pedram, “Design and Analysis of
Two Low Power SRAM Cell Structures,” IEEE Transactions
on Very Large Scale Integrated Circuits, vol. 17, no.
10, Oct. 2009, pp. 1551 – 1555.

M.
Daneshtalab, M. Ebrahimi, S. Mohammadi, and A.
AfzaliKusha, “Lowdistance Pathbased Multicast
Routing Algorithm for NetworkonChips,” IET Proceedings
of Computer and Digital Techniques,
vol. 3, no. 5, pp. 430442, Sept. 2009

M. Saneei,
A. AfzaliKusha, and Z. Navabi,
“Sign Bit Reduction Encoding For Low Power
Applications,” Journal of VLSI Signal Processing
Systems, September 2009, vol. 57, no. 3, pp. 321 – 329.

M.
MottaghiDastjerdi, A. AfzaliKusha, and M.
Pedram, “BZFAD: A LowPower LowArea Multiplier based
on ShiftandAdd Architecture,” IEEE Transactions on
Very Large Scale Integrated Circuits, 2009, vol. 17, no.
2, pp. 302 – 306.

M. Saneei,
A. AfzaliKusha, and M. Pedram, “Two High
Performance and Low Power Serial Communication
Interfaces for Onchip Interconnects,” Canadian Journal
of Electrical and Computer Engineering, July 2008.

G.
Razavipour, A. AfzaliKusha, and M. Pedram,
“Design and Analysis of Two Low Power SRAM Cell
Structures,” IEEE Transactions on Very Large Scale
Integrated Circuits, July 2008.

M. Saneei,
A. AfzaliKusha, and Z. Navabi, “A LowPower High
Throughput Link Splitting Router for NoCs,” Journal of
Zhejiang UniversitySCIENCE A, 2008, vol. 9, no. 12, pp.
1708 – 1714.

M. Samadi
and A. AfzaliKusha, “Dynamic power management
with fuzzy decision support system,” IEICE Electronics
Express, August 2008, vol. 5, no. 19, pp. 789 – 795.

A. Abbasian, S. Hatami,
A. AfzaliKusha, and M.
Pedram, "WaveletBased Dynamic Power Management for
Nonstationary Service Requests," ACM Transactions on
Design Automation of Electronic Systems, 2008, vol. 13,
no. 1, article 13, pp. 13:113:41.

H.
ParehdehAfshar, M. Saneei, A. AfzaliKusha, and M.
Pedram, "Fast INCXOR codec for lowpower address
buses," IET Comput. Digit. Tech., 2007, vol. 1, no. 5,
pp. 625631.

A. Mehran,
S. Saeidi, A. Khademzadeh, and A. AfzaliKusha, "Spiral:
A heuristic mapping algorithm for network on chip,"
IEICE Electronics Express, 2007, vol. 4, no. 15, August
10, 2007, pp. 478484.

F. Aezinia and
A. AfzaliKusha, "Low Power High Performance
Level Converter for Dual Supply Voltage Systems," IEICE
Electronics Express, vol. 4 (2007), no. 9, pp. 306311.

A. Amirabadi, Y. Mortazavi,
A.
AfzaliKusha, and M. Nourani, “Clock Delayed Domino
Logic with Efficient Variable Threshold Voltage Keeper,”
Accepted for publication in IEEE Transaction on Very
Large Scale Integrated Circuits, October 2006.

S. Sharifi, J. Jaffari, M.
Hosseinabady, A. AfzaliKusha, and Z. Navabi,
“ScanBased Structure with Reduced Static and Dynamic
Power Consumption,” to appear in Journal of Low Power
Electronics, vol. 2, no. 3, Dec. 2006, pp. 477487.

A.
AfzaliKusha, M. Nagata, N.K. Verghese, and D.J.
Allstot, “Substrate Noise Coupling in SoC Design:
Modeling, Avoidance, and Validation,” to appear in
Proceedings of the IEEE, Dec. 2006.

K. Shoajee,
M. Gholipour, A. AfzaliKusha, and M. Nourani,
“Comparative study of asynchronous pipeline design
methods”, IEICE Electronics Express, vol. 3, no.
8, April 2006, pp. 163–171.

B. Bornoosh,
A. AfzaliKusha, R. Dehghani, M. Mehrara, S.M.
Atarodi, and M. Nourani, “Reduced Complexity 1Bit
HighOrder Digital DeltaSigma Modulator for LowVoltage
FractionalN Frequency Synthesis Applications,” The
IEEProceedings Circuits, Devices & Systems, vol.
152, no. 5, October 2005, pp. 471–477.

P. Hashemi,
A. Behnam, E. Fathi, A. AfzaliKusha, and M. El
Nokali, “2D Modeling of Potential Distribution and
Threshold Voltage of Short Channel Fully Depleted Dual
Material Gate SOI MESFET,” SolidState Electronics,
vol. 49, no. 8, pp. 1341–1346, August, 2005.

B. Afzal, A.
Zahabi, A. Amirabadi, Y. Koolivand, A. AfzaliKusha,
and M. El Nokali, “Analytical Model for CV
Characteristic of FullyDepleted SOIMOS Capacitors,” SolidState Electronics, vol. 49, no. 8, pp.
1262–1273, August, 2005.

M. Maddah,
H. SoltanianZadeh, A. AfzaliKusha, A. Shahrokni,
Z.G. Zhange, “ThreeDimensional Analysis of Complex
Branching Vessels in Confocal Microscopy Images,” Computerized Medical Imaging and Graphics, vol. 29,
pp. 487498, no. 6, 2005.

S.H. Rasouli,
A. Khademzadeh, A. AfzaliKusha, and M. Nourani
“Lowpower single and double edgetriggered flipflops
for high speed applications,” IEE
ProceedingsCircuits, Devices and Systems, vol. 152,
no. 2, pp. 118122, April 2005.

B.
Hekmatshoar, S. Mohajerzadeh, D. Shahrjerdi, A.
AfzaliKusha, M.D. Robertson, and A. Tonita,
“Lowtemperature copperinduced lateral growth of
polycrystalline germanium assisted by external
compressive stress,” Journal of Applied Physics,
vol. 97, issue 4, Feb., 2005, pp. 04490115.

D.
Shahrjerdi, B. Hekmatshoar, A. Khakifirooz, and A.
AfzaliKusha, “Optimization of the VTControl Method
for LowPower UltraThin DoubleGate SOI Logic
Circuits,” The VLSI Journal of Integration, vol.
38, issue 3, January 2005, pp. 505513.

S.
Hatami, M.Y. Azizi, H.R. Bahrami, D. Motavalizadeh, and
A. AfzaliKusha “Accurate and Efficient
Modeling of SOI MOSFET with Technology Independent
Neural Networks,” IEEE Transactions on ComputerAided
Design of Integrated Circuits and Systems, vol. 23,
no. 11, pp. 15801587, 2004.

A. Abbasian,
S.H. Rasouli, A. AfzaliKusha, and M. Nourani
“Norace Charge Recycling Complementary Pass transistor
Logic (NCRCPL) and its Pipeline Eventdriven Structure
for Low Power Applications,” IEE Proceedings of
Computer and Digital Techniques, vol. 151, no. 3,
pp. 183190, May 2004.

S. Bolouki,
M. Maddah, A. AfzaliKusha, and M. El Nokali, “A
Unified IV model for PD/FD SOI MOSFETs with a Compact
Model for Floating Body Effects,” SolidState
Electronics, vol. 47, no. 11, pp. 19091915,
November 2003.

T. Maleki,
S. Mohajerzadeh, and A. AfzaliKusha, “Plastic
micromachining assisted by ultraviolet illumination,”
IEEE Transactions on Electron Devices, vol. 50,
no. 8, pp. 18131815, August 2003.

M. Maddah,
H. SoltanianZadeh, and A. AfzaliKusha, “Snake
Modeling and Distance Transform to Vascular Centerline
Extraction and Quantification,” Computerized Medical
Imaging and Graphics, vol. 27, no. 6, pp. 503512,
April 2003.

M. Maddah,
A. AfzaliKusha, and H. SoltanianZadeh,
“Efficient centerline extraction for quantification of
vessels in confocal microscopy images,” Med. Phys., vol.
30, no. 2, pp. 203211, February, 2003.

H.
MahmoodiMeimand, A. AfzaliKusha and M. Nourani,
“Adiabatic carry lookahead adder with efficient power
clock generator,” IEE ProceedingsCircuits, Devices
and Systems, vol. 148, no. 5, pp. 229234, 2001.

S. M.J.
OkhovatAlavian, A. AfzaliKusha, and M. Kamarei,
“Intersubband relaxation in conduction band quantum
wells,” Winter Edition, AmirKabir University Journal of
Engineering, vol. 12, no. 45, pp. 5362, 2001. (in
Persian).

C.Y. Sung,
T.B. Norris, A. AfzaliKushaa, and G.I. Haddad,
“Femtosecond Intersubband Relaxation and Population
Inversion in Stepped Quantum Wells,” Applied Physics
Letters, vol. 68, no. 4, pp. 435437, 1996.

A.
AfzaliKushaa and G.I. Haddad, “Effects of Biaxial
Strain on the Intervalenceband Absorption Spectra of
InGaAs/InP Systems,” Journal of Applied Physics, vol.
77, no. 12, pp. 65496 556, 1995.

A.
AfzaliKushaa and G.I. Haddad, “High Frequency
Characteristics of MESFET's,” Solid State Electronics,
vol. 38, no.2, pp. 401406, Feb. 1995.

X. Zhang, A. AfzaliKushaa, W.L. Chen, G. Munns, and G.I.
Haddad, “Absorption and Population Inversion in ptype
InGaAs Strained Layers Based on Intervalence Subband
Transitions at FIR Frequencies,” Infrared Phys. Technol.
vol. 36, no. 1, pp. 545550, 1995.

A.
AfzaliKushaa, G.I. Haddad, and T.B. Norris,
“Optically Pumped Intersubband Lasers Based on Quantum
Wells,” IEEE Journal of Quantum Electronics, vol. 31,
no. 1, pp. 135143, Jan. 1995.

A.
AfzaliKushaa and G.I. Haddad, “Efficient
Calculation of the Scattering Rates in Valence Band
Quantum Wells,” Physical Review B (Condensed Matter),
vol. 50, no. 11, pp. 77017; 15 Sept. 1994 .

A.
AfzaliKushaa and M. ElNokali, “Modeling the MOS
Transistor,” International Journal of Electronics, vol.
74, no. 2, pp. 213229, 1993.

A.
AfzaliKushaa and M. ElNokali, “Modeling
Subthreshold Capacitances of MOS Transistors,” Solid
State Electronics, vol. 35, no. 1, pp. 4549, Jan. 1992.
Conferences/Symposiums:

S. Vahdat, M. Kamal, A. AfzaliKusha, M. Pedram, Z. Navabi, TruncApp: A Truncationbased Approximate Divider for Energy Efficient DSP Applications,” Lausanne, Switzerland, Accepted in Design Automation and Test in Europe (DATE), Lausanne, Switzerland, pp. 16351638, March 2731, 2017.

A. BanaGozar, M. A. Maleki, M. Kamal, A. AfzaliKusha, and M. Pedram, “Sustainable Neuromorphic Computing in the Presence of Process Variation,” Accepted in Design Automation and Test in Europe (DATE), Lausanne, Switzerland, pp. 440445, March 2731, 2017.

M. Hemmat, M. Kamal, A. AfzaliKusha, and M. Pedram, “Hybrid TFETMOSFET Circuits: An Approach to Design Reliable UltraLow Power Circuits in the Presence of Process Variation,” in the Proceedings of IFIP/IEEE International Conference on Very Large Scale Integration (VLSISoC), Tallinn, Estonia, September 2628, 2016, DOI: 10.1109/VLSISoC.2016.7753578.

S.S. NabaviLarimi, M. Kamal, A. AfzaliKusha, and H. Mahmoodi, “Power and Energy Reduction of Racetrackbased Caches by Exploiting Shared Shift Operations,” in the Proceedings of IFIP/IEEE International Conference on Very Large Scale Integration (VLSISoC), Tallinn, Estonia, September 2628, 2016, DOI: 10.1109/VLSISoC.2016.7753563.

R. Zendegani, M. Kamal, A. AfzaliKusha, and Massoud Pedram, “SEERAD: A High Speed yet EnergyEfficient Roundingbased Approximate Divider”, in the Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, pp. 14811484, March 1418, 2016.

Iranfar, S. NazarShahsavani, M. Kamal, and A. AfzaliKusha, “A Heuristic Machine Learningbased Algorithm for Power and Thermal Management of Heterogeneous MPSoCs,” in Proceedings of International Symposium on Low Power Electronics and Design (ISLPED), Rome, Italy, pp. 291  296, July 2224, 2015, DOI: 10.1109/ISLPED.2015.7273529.

M. Kamal, A. Iranfar, A. AfzaliKusha, and M. Pedram, “A thermal stressaware algorithm for power and temperature management of MPSoCs,” in Proceedings of Design Automation and Test in Europe (DATE), Grenoble, France, pp. 954959, March 913, 2015, DOI: 10.7873/DATE.2015.0761.

R. Yarmand, B. Ebrahimi, H. AfzaliKusha, A. AfzaliKusha, and M. Pedram, “High Performance and High Yield 5 nm Underlapped FinFET SRAM Design Using P type Access Transistors,” in Proceedings of International Symposium on Quality Electronic Design, March 24, 2015.

B. Bozorgzadeh, S. Shahdoost, and A. AfzaliKusha, “Delay variation analysis in the presence of power supply noise in nanoscale digital VLSI circuits,” in Proceedings of International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, Texas, August 36, 2014, pp. 117120.

M. Nejat, B. Alizadeh, and A. AfzaliKusha, “Dynamic FlipFlop conversion to tolerate process variation in low power circuits,” in Proceedings of Design Automation and Test in Europe (DATE), DOI: 10.7873/DATE.2014.124, March 2428, 2014.

M. Kamal, A. Ghasemazar, A. AfzaliKusha, and M. Pedram, “Improving Efficiency of Extensible Processors by Using Approximate Custom Instructions,” in Proceedings of Design Automation and Test in Europe (DATE) Conference, DOI: 10.7873/DATE.2014.238, March 2428, 2014.

A. Ghasemazar, M. Goli, and A. AfzaliKusha, “Embedded Complex Floating Point Hardware Accelerator,” in Proceedings of International Conference on VLSI Design, DOI: 10.1109/VLSID.2014.61, Mumbai, India, January 59, 2014, pp. 318 – 323.

M. Y. Zarei, R. Asadpour, S. Mohammadi, A. AfzaliKusha, R. Seyyedi, “Modeling symmetrical independent gate FinFET using predictive technology model” in Proceedings of Great Lakes Symposium on VLSI (GLSVLSI), Paris, France, May 24, 2013, pp. 299304.

B. Eghbalkhah, S. A. KashaniGharavi, A. AfzaliKusha, and M. B. GhaznaviGhoushchi, “Selfimpact of NBTI effect on the degradation rate of threshold voltage in PMOS transistors,” in Proceedings of Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Abu Dhabi, UAE, March 2628, 2013, pp. 151154.

M. Kamal, A. AfzaliKusha, S. Safari, M. Pedram, B. Eghbalkhah, “Capturing and mitigating the NBTI effect during the design flow for extensible processors,” in Proceedings of Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Abu Dhabi, UAE, March 2628, 2013, pp. 9497.

B. Ebrahimi, A. AfzaliKusha, N. Sehatbakhsh, “Robust polysilicon gate FinFET SRAM design using dynamic backgate bias,” in Proceedings of Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Abu Dhabi, UAE, March 2628, 2013, pp. 171 – 172.

V. Akhlaghi, M. Kamal, A. AfzaliKusha, M. Pedram, “An efficient network onchip architecture based on isolating local and nonlocal communications,” Proceedings of the Design, Automation and Test in Europe, March 1822, Grenoble, France, 2013, pp. 350353.

M.
Kamal, Q. Xie, M. Pedram, A. AfzaliKusha and S.
Safari, “An Efficient Relibaility Simulation Flow for
Evaluating the Hot Carrier Injection Effect in CMOS VLSI
Circuits,” in Proceedings of IEEE International
Conference on Computer Design, Montreal, Canada, Sept.
30 – Oct. 3, 2012. (Best Paper Award)

B.
Ebrahimi and A. AfzaliKusha, “Analysis of SRAM
Cell Characteristics Based on Highk MetalGate Strained
Si/Si1xGex MOSFET with Consideration of NBTI/PBTI,” in
Proceedings of International Conference on Synthesis,
Modeling, Analysis and Simulation Methods and
Applications to Circuit Design, Seville, Spain,
September 19 – 21, 2012.

B.
Ebrahimi, H. AfzaliKusha, and A. AfzaliKusha,
“Low Power and Robust 8T/10T Subthreshold SRAM Cells,”
in Proceedings of International Conference on Synthesis,
Modeling, Analysis and Simulation Methods and
Applications to Circuit Design, Seville, Spain,
September 19 – 21, 2012.

M.
Saffari, S. Lotfi, N. Jafarzadeh, and A. AfzaliKusha,
“Mapping of cores on to diagonal meshbased
networkonchip,” in Proceedings of Mediterranean
Conference on Embedded Computing (MECO), Bar,
Montenegro, June 19–21, 2012, pp. 233 – 238.

A.
Khosropour, S.A. KashaniGharavi, Reza Asadpour, and
A. AfzaliKusha, “Process Variation Tolerant SRAM
Cell Design Using Additive Model Considering NBTI
Effect,” in Proceedings of Asia Symposium on Quality
Electronic Design, Penang, Malaysia, July 10 – 11, 2012,
pp. 46  53.

B.
Ebrahimi, R. Asadpour, and A. AfzaliKusha,
“LowPower and Robust SRAM Cells Based on Asymmetric
FinFET Structures,” in Proceedings of Asia Symposium on
Quality Electronic Design, Penang, Malaysia, July 10 –
11, 2012, pp. 41  45.

M.
Kamal, S. Safari, A. AfzaliKusha, and M. Pedram,
“An ArchitectureLevel Approach for Mitigating the
Impact of Process Variations on Extensible Processors,”
in Proceedings of the Design, Automation and Test in
Europe, March 1216, Dresden, Germany, 2012, pp.
467472.

A.
Khosropour, H. Aghababa, B. Forouzandeh, and A.
AfzaliKusha, “Chip Level Statistical Leakage Power
Estimation Using Generalized Extreme Value Distribution”
in Proceedings of the International Workshop on Power
and Timing Modeling Optimization and Simulation (PATMOS),
Madrid, Spain, September 2629, 2011, pp. 173179.

A.
Alimardani, M. Noei, E. AslSoleimani, and A.
AfzaliKusha, “Simulation and Optimization of CIGS
Solar Cells in Concentrated Sunlight,” in Proceedings of
the ISES Solar World Congress, 2011, Kassel, Germany, 28
August  2 September 2011, pp. 17.

A.
Alimardani, E. AslSoleimani, and A. AfzaliKusha,
“Simulation and Optimization of Emitter Depth and Doping
for Silicon Solar Cells under Concentrated Sunlight,” in
Proceedings of the ISES Solar World Congress, Kassel,
Germany, 28 August  2 September 2011, pp. 17.

A.
Alimardani, N. Manavizadeh, A. AfzaliKusha, and
E. AslSoleimani, “Simulation of lateral effect in
emitter region of silicon solar cells for concentrated
sunlight,” in Proceedings of the 12th Int. Conf. on
Thermal, Mechanical and MultiPhysics Simulation and
Experiments in Microelectronics and Microsystems, (EuroSimE),
Linz, Austria, April 1820, 2011, art. no. 5765820, pp.
15.

M. Kamal,
A. AfzaliKusha, and M. Pedram.
"Timing variationaware custom instruction extension
technique," in Proceedings of the Design,
Automation and Test in Europe (Date), 2011, pp.
15171520.

H. Aghababa,
M. Zangeneh, A. AfzaliKusha, and B. Forouzandeh,"
Statistical delay modeling of read operation of SRAMs
due to channel length variation," in Proceedings of the
2010 IEEE International Symposium on Circuit and Systems
(ISCAS), 2010, pp. 25022505.

M. Saremi,
B, Ebrahimi, and A. AfzaliKusha,"Process
variation study of Ground Plane SOI MOSFET," in
Proceedings of the 2nd Asia Symposium on Quality
Electronic Design (ASQED), 2010, pp. 6669.

F. Firouzi,
S. Kiamehr, P. Monshizadeh, M. Saremi, A.
AfzaliKusha, and S.M. Fakhraie,"A model for
transient fault propagation considering glitch amplitude
and risefall time mismatch," in Proceedings of the 2nd
Asia Symposium on Quality Electronic Design (ASQED),
2010, pp. 8992.

S. Kiamehr,
A.R. AhmadiMehr, S.N. Mozaffari, and A. AfzaliKusha,"
A new blockbased SSTA method considering withindie
variation," in Proceedings of the 2nd Asia Symposium on
Quality Electronic Design (ASQED), 2010, pp. 260263.

S.N.
Mozaffari, and A. AfzaliKusha," Statistical
model for subthreshold current considering process
variations," in Proceedings of the 2nd Asia Symposium on
Quality Electronic Design (ASQED), 2010, pp. 356360.

H.
Aghababa, B. Forouzandeh, H. Dehghan, and A.
AfzaliKusha, “A robust method to estimate power and
delay for digital integrated circuits,” in Proceedings
of NORCHIP, Trondheim, Norway, Nov. 1617, 2009, pp. 1 –
5.

M.
Nickray, M. Dehyadgari, and A. AfzaliKusha,
“Adaptive routing using contextaware agents for
networks on chips,” in Proceedings of International
Design and Test Workshop, Nov. 1517, 2009, Riyadh,
Saudi Arabia, pp. 1 – 6.

H.
Aghababa, A. AfzaliKusha, and B. Forouzandeh,
“Static power optimization of a FullAdder under
FrontEnd of Line systematic variations,” in Proceedings
of International Design and Test Workshop, Nov. 1517,
2009, Riyadh, Saudi Arabia, pp. 1 – 6.

M.
Saneei, M.R. Kakoee, and A. AfzaliKusha, “COMRA:
An efficient lowenergy core mapping and routing path
allocation algorithm for heterogeneous NoCs,” in
Proceedings of International Design and Test Workshop,
Nov. 1517, 2009, Riyadh, Saudi Arabia, pp. 1 – 6.

M.
Nickray and A. AfzaliKusha, “RATC: A robust
topology control algorithm for heterogeneous wireless
sensor networks,” in Proceedings of International Design
and Test Workshop, Nov. 1517, 2009, Riyadh, Saudi
Arabia, pp. 1 – 5.

H.R.
Ahmadi and A. AfzaliKusha, “LowPower LowEnergy
PrimeField ECC Processor Based on Montgomery Modular
Inverse Algorithm,” in Proceedings of Euromicro
Conference on Digital System Design, Architectures,
Methods and Tools, Patras, Greece, Aug. 2729, 2009, pp.
817 – 822.

B.
Ebrahimi and A. AfzaliKusha, “Realistic CNFET
based SRAM cell design for better write stability,” in
Proceedings of Asia Symposium on Quality Electronic
Design, Kuala Lumpur, Malaysia, July 1516, 2009, pp. 14
– 18.

A.R.
Ahmadimehr, B. Ebrahimi, and A. AfzaliKusha, “A
high speed subthreshold SRAM cell design,” in
Proceedings of Asia Symposium on Quality Electronic
Design, Kuala Lumpur, Malaysia, July 1516, 2009, pp. 9
– 13.

N.
Ghobadi, A. AfzaliKusha, E. ; AslSoleimani,
“Analytical modeling of Hot Carrier Injection induced
degradation in triple gate bulk FinFETs,” in Proceedings
of Asia Symposium on Quality Electronic Design, Kuala
Lumpur, Malaysia, July 1516, 2009, pp. 28 – 34.

M.
Gholipour, M. Nourani, D. Edwards, and A.
AfzaliKusha, "LLA: A lowlatency asynchronous
control with applications," in Proceedings of
International Symposium on Signals, Circuits and
Systems, Iasi, Romania, July 910, 2009, pp. 1 – 4.

H.R. Ahmadi
and A. AfzaliKusha, “Very lowpower flexible
GF(p) ellipticcurve cryptoprocessor for
nontimecritical applications,” in
Proceedings of IEEE International Symposium on Circuits
and Systems, Taipei, Taiwan, May 2427, 2009, pp. 904 –
907.

S.
SoleimaniAmiri, A. AfzaliKusha, B. Forouzandeh,
“Hightemperature CNFET characteristics,” in Proceedings
of International Conference on Thermal, Mechanical, and
MultiPhysics Simulation and Experiments in
Microelectronics and Microsystems, Delft, Netherland,
April 2629, 2009, pp. 1 – 4.

M. Ebrahimi,
M. Daneshtalab, M. H. Neishaburi, S. Mohammadi, A.
AfzaliKusha, J. Plosila, and H. Tenhunen, “An
Efficient Dynamic Multicast Routing Protocol for
Distributing Traffic in NOCs,” in Proceedings of Design,
Automation and Test in Europe, 2024 April, Nice,
France, 2009.

S. Mohammdi
and A. AfzaliKusha, “An Efficient Threshold
Voltage Model for Ultra Thin Body Double Gate/SOI
MOSFETs,” in Proceedings of Ultimate Integration on
Silicon Conference, Aachen, Germany, March 16 – 18,
2009.

S. Mohammdi
and A. AfzaliKusha, “A Surface Field Based Model
for Ultra Thin Body Undoped Symmetric DG MOSFETs,” in
Proceedings of Ultimate Integration on Silicon
Conference, Aachen, Germany, March 16 – 18, 2009.

N. Ghobadi,
A. AfzaliKusha, and E. AslSoleimani, “Modeling
Effect of Negative Bias Temperature Instability on
Potential Distribution and Degradation of Doublegate
MOSFETs,” in Proceedings of Ultimate Integration on
Silicon Conference, Aachen, Germany, March 16 – 18,
2009.

N. Ghobadi,
A. AfzaliKusha, and E. AslSoleimani,
“Analytical Modeling of Negative Bias Temperature
Instability in Triple Gate MOSFETs,” in Proceedings of
Ultimate Integration on Silicon Conference, Aachen,
Germany, March 16 – 18, 2009.

S.
Zeinolabedinzadeh, B. Ebrahimi, and A. AfzaliKusha,
“VthControl Method in Double Gate Field Effect
Transistor Domino Circuits,” in Proceedings of Ultimate
Integration on Silicon Conference, Aachen, Germany,
March 16 – 18, 2009.

B. Ebrahimi
and A. AfzaliKusha, “NBTI Tolerant 4T
DoubleGate SRAM Design,” in Proceedings of Ultimate
Integration on Silicon Conference, Aachen, Germany,
March 16 – 18, 2009.

B.
Bozorgzadeh and A. AfzaliKusha, “Novel MOS
Decoupling Capacitor Optimization Technique for
Nanotechnologies,” in Proceedings of International
Conference on VLSI Design, Jan. 5 – 9, 2009, New Delhi,
India, pp. 175180.

A.M.
Rahmani, I. Kamali, P. LotfiKamran, A. AfzaliKusha,
S. Safari, “Negative Exponential Distribution Traffic
Pattern for Power/Performance Analysis of Network on
Chips,” in Proceedings of International Conference on
VLSI Design, Jan. 5 – 9, 2009, New Delhi, India, pp.
157162.

A.M.
Rahmani, M. Daneshtalab, A. AfzaliKusha, S.
Safari, M. Pedram, “ForecastingBased Dynamic Virtual
Channels Allocation for Power Optimization of
NetworkonChips,” in Proceedings of International
Conference on VLSI Design, Jan. 5 – 9, 2009, New Delhi,
India, pp. 151156.

H.R. Ahmadi
and A. AfzaliKusha, “LowPower Flexible GF(p)
EllipticCurve Cryptography Processor” in Proceedings of
3rd International Design and Test Workshop, Monastir,
Tunisia on Dec. 2022, 2008, pp. 182186.

A.M.
Rahmani, M. Daneshtalab, A. AfzaliKusha, and S.
Safari “Power Efficient Switches with Dynamic Virtual
Channel Allocation for NetworkonChips,” in Proceedings
of the 5th International Conference on Innovations in
Information Technology, Dubai, UAE, December 1618,
2008.

A.A.
Salehpour, B. Mirmobin, A. AfzaliKusha, and S.
Mohammadi, “An Energy Efficient Routing Protocol for
ClusterBased Wireless Sensor Networks Using Ant Colony
Optimization,” in Proceedings of the 5th International
Conference on Innovations in Information Technology,
Dubai, UAE, December 1618, 2008.

A.A.
Salehpour, A. AfzaliKusha, and S. Mohammadi,
“Efficient Clustering of Wireless Sensor Networks Based
on Memetic Algorithm,” in Proceedings of the 5th
International Conference on Innovations in Information
Technology, Dubai, UAE, December 1618, 2008.

S. Soleimani,
A. AfzaliKusha, and B. Forouzandeh, “Temperature
Dependence of Propagation Delay Characteristic in FinFET
Circuits,” in Proceedings of the 20th International
Conference on Microelectronics, Sharjah, UAE, Dec.
1416, 2008, pp. 247250.

B.
Bozorgzadeh, E. ZhianTabasi, and A. AfzaliKusha,
“LowPower HighPerformance Logic Style for LowVoltage
CMOS Technologies,” in Proceedings of the 20th
International Conference on Microelectronics, Sharjah,
UAE, Dec. 1416, 2008, pp. 251254.

B.
Bozorgzadeh and A. AfzaliKusha, “Decoupling
Capacitor Optimization for Nanotechnology Designs,” in
Proceedings of the 20th International Conference on
Microelectronics, Sharjah, UAE, Dec. 1416, 2008, pp.
6467.

H.
Hosseinzadegan, H. Aghababa, M. Zangeneh, A.
AfzaliKusha, and B. Forouzandeh, “A compact
currentvoltage model for carbon nanotube field effect
transistors,” in Proceedings of International
Semiconductor Conference, Oct. 13 – 15, 2008, Sinaia,
Romania, pp. 359 – 362.

M. Gholipour,
A. AfzaliKusha, and M. Nourani, “A Novel Low
Latency Asynchronous Pipeline Control Circuit,” in
Proceedings of International Conference on Applied
Electronics, Sept. 10 – 11, 2008, Pilsen, Czech
Republic, pp. 5355. 20. M.R. BineshMarvasti, M. Daneshtalab,
A.
AfzaliKusha, and S. Mohammadi, “PAMPR: PowerAware
and Minimum Path Routing Algorithm for NoCs,” in
Proceedings of International Conference on Electronics,
Circuits, and Systems, Aug. 31 – Sept. 3, 2008, Malta,
pp. 418 – 421.

M. Hosseini,
A. Jahanshahi, A. AfzaliKusha, and B.
Forouzandeh, “Modeling of Internal and External Fringe
Capacitance Poly and Metal Gates in Nanoscale SOI CMOS
Devices and Their Variations with Dielectric Constant,”
in Proceedings of 16th Iranian Conference on Electrical
Engineering, Tehran, Iran, May 1416, 2008, pp. 612.

M. Rostami,
B. Ebrahimi, and A. AfzaliKusha, “Design
Centering Scheme for Robust SRAM Cell Design,” in
Proceedings of International Conference on Computer and
Communication Engineering, May 1315, 2008, Kuala
Lumpur, Malaysia, pp. 871 – 877.

B. Afzal, M.
Rostami, M. Samadi, and A. AfzaliKusha, “An
Analytical Model for Threshold Voltage of FinFETs,” in
Proceedings of International Conference on Computer and
Communication Engineering, May 1315, 2008, Kuala
Lumpur, Malaysia, pp. 760 – 763.

H. Aghababa,
M.H.A. Yazdinejad, A. AfzaliKusha, and B.
Forouzandeh, “Simplified Quantumdot Cellular Automata
Implementation of Counters,” in Proceedings of 7th
International Caribbean Conference on Devices, Circuits
and Systems, Cancun, Mexico, April 2830, 2008.

H. Aghababa,
N. Masoumi, A. AfzaliKusha, and B. Forouzandeh,
“TimeDomain Analysis of Carbon Nanotubes,” in
Proceedings of 7th International Caribbean Conference on
Devices, Circuits and Systems, Cancun, Mexico, April
2830, 2008.

H. Aghababa,
M. Jourabchian, A. AfzaliKusha, and B.
Forouzandeh, “Asynchronous circuits design using
quantumdot cellular automata for molecular computing,”
in Proceedings of 7th International Caribbean Conference
on Devices, Circuits, and Systems, Cancun, Mexico, April
2830, 2008.

B. Ebrahimi,
S. Zeinolabedinzadeh, and A. AfzaliKusha, “Low
Standby Power and Robust FinFET Based SRAM Design,” in
Proceedings of IEEE Computer Society Annual Symposium on
VLSI, April 7 – 9, 2008, Montpellier, France, pp.
185190.

H. Aghababa,
M. Jourabchian, B. Forouzandeh, and A. AfzaliKusha,
“Asynchronous Circuits Design Using Quantumdot Cellular
Automata for Molecular Computing,” in Proceedings of
Mosharaka International Conference on Communications,
Propagation, and Electronics, March 68, 2008, Amman,
Jordan.

P. Lotfi,
A.M. Rahmani, A.A. Salehpour, A. AfzaliKusha, and Z.
Navabi “Stall Power Reduction in Pipelined Architecture
Processors,” Accepted for presentation at 21st
International Conference on VLSI, Hyderabad, January
48, 2008.

M. Samadi
and A. AfzaliKusha, “Power Management with Fuzzy
Decision Support System,” in Proceedings of The 7th
International Conference on ASIC, October 2629, 2007,
Guilin, China.

M. Samadi,
A. AfzaliKusha, and C. Lucas, “Power Management by
Brain Emotional Learning Algorithm,” in Proceedings of
The 7th International Conference on ASIC, October 2629,
2007, Guilin, China.

M. A. Karami,
M. AhmadiBoroujeni, A. AfzaliKusha, and R. FarajiDana,
“SemiAnalytic Model for Dispersion Relation of Nanowire
Lasers,” in Proceedings of The 2nd International
Conference on NanoNetworks, September 2426, 2007,
Catania, Italy.

M.R.
BineshMarvasti, M. Saneei, and A. AfzaliKusha,
“TimeEfficient PowerConstrained Core Mapping Algorithm
in NoC Based on Genetic Algorithm,” in Proceedings of
the IEEE EastWest Design & Test International
Symposium, September 710, 2007, Yerevan, Armenia, pp.
205210.

M.R.
BineshMarvasti, S. Safari, A. AfzaliKusha, and S.
Mohammadi, “A Novel FaultTolerant Reconfigurable NoC
Architecture,” in Proceedings of the IEEE EastWest
Design & Test International Symposium, September 710,
2007, Yerevan, Armenia, pp. 682686.

B.
Eghbalkhah, B. Afzal, and A. AfzaliKusha, “Speed
Improvement Algorithm for 16×16 Multipliers using Sizing
Optimization,” in Proceedings of IEEE International
Conference on Design & Technology of Integrated Systems,
Rabat, Morocco, September 25, 2007, pp. 102105.

B.
Eghbalkhah, B. Bornoosh, Z. AminiSheshdeh, and A.
AfzaliKusha, “A New Preambleless Timing
Synchronization Method for OFDM Systems under MultiPath
Channels,” in Proceedings of IEEE International
Conference on Design & Technology of Integrated Systems,
Rabat, Morocco, September 25, 2007, pp. 204207.

V. Moallemi
and A. AfzaliKusha, “Subthreshold Pass Transistor Logic
for UltraLow Power Operation,” in Proceedings of 15th
Iranian Conference on Electrical Engineering
(Electronics), May 1517, 2007, Tehran, Iran, pp.
138143.

Z. Jeddi, E.
Amini, A. AfzaliKusha, “PowerDriven Partitioning,” in
Proceedings of 15th Iranian Conference on Electrical
Engineering (Computer), May 1517, 2007, Tehran, Iran,
pp. 3134.

V. Moalemi
and A. AfzaliKusha, "Subthreshold 1Bit Full Adder
Cells in sub100 nm Technologies," in Proceedings of
IEEE Computer Society Annual Symposium on VLSI, Porto
Alegre, Brazil, May 911, pp. pp. 514515.

V. Moalemi
and A. AfzaliKusha, "Subthreshold Pass Transistor Logic
for UltraLow Power Operation," in Proceedings of IEEE
Computer Society Annual Symposium on VLSI, Porto Alegre,
Brazil, May 911, pp. pp. 490491.

M.A. Karami,
A. AfzaliKusha, R. FarajiDana, and M. Rostami,
"Quantitative Comparison of Optical and Electrical H, X,
and Y clock Distribution Networks," in Proceedings of
IEEE Computer Society Annual Symposium on VLSI, Porto
Alegre, Brazil, May 911, pp. 488  489.

M.
SavadiOskoeei, A. AfzaliKusha, S.M. Atarodi, " A
HighSpeed and LowPower Voltage Controlled Oscillator
in 0.18μm CMOS Process," in Proceedings of IEEE
International Symposium on Proceedings of Circuits and
Systems, May 2730, 2007, Orlando, U.S.A., pp. 933936.

M.
Daneshtalab, A. Pedram, M. H. Neishaburi, M. Riazati, A.
AfzaliKusha, and S. Mohammadi, "Distributing
Congestions in NoCs through a Dynamic Routing Algorithm
based on Input and Output Selections," in Proceedings of
International Conference on VLSI Design, Bangalore,
India, Jan. 610, 2007, pp. 546560.

M. Riazati,
S. Mohammadi, A. AfzaliKusha, and Z. Navabi, "Improved
Assertion Lifetime via AssertionBased Testing
Methodology," in Proceedings of the 18th International
Conference on Microelectronics, Saudi Arabia, Dec.
1719, 2006, pp. 4851.

H.
ParandehAfshar, A. AfzaliKusha, and A. Khakifirouz, “A
Very Fast and Low Power PseudoIncrementer for Address
Bus Encoder/Decoder,” in Proceedings of the 18th
International Conference on Microelectronics, Saudi
Arabia, Dec. 1719, 2006, pp. 9194.

M.
DastjerdiMottaghi, A. Naghilou, A. AfzaliKusha, Z.
Navabi, and M. Daneshtalab, “Hot Block Ring Counter: A
Low Power Synchronous Ring Counter,” in Proceedings of
the 18th International Conference on Microelectronics,
Saudi Arabia, Dec. 1719, 2006, pp. 5862

M. Saneei,
A. AfzaliKusha,
and Z. Navabi, “A Mesochronous Technique for
Communication in Network on Chips,” in Proceedings of
the 18th International Conference on Microelectronics,
Saudi Arabia, Dec. 1719, 2006.

M. Saneei,
A. AfzaliKusha,
and Z. Navabi, “Lowlatency MultiLevel Mesh Topology
for NoCs,” in Proceedings of the 18th International
Conference on Microelectronics, Saudi Arabia, Dec.
1719, 2006

E. Rahmani, Z. Pajouhi, N.
KazemianAmiri, and A. AfzaliKusha, “Modified
LeakageBiased Domino Circuit with LowPower and
LowDelay Characteristics,” in Proceedings of the 18th
International Conference on Microelectronics, Saudi
Arabia, Dec. 1719, 2006

A.S. Seyedi and
A. AfzaliKusha,
“Doubleedge Triggered Level Converter FlipFlop with
Feedback,” in Proceedings of the 18th International
Conference on Microelectronics, Dhahran, Saudi Arabia,
Dec. 1719, 2006

M. A. Karami and
A. AfzaliKusha,
“Adaptive Neural Network Model for SOIMOSFET IV
Characteristics Including SelfHeating Effects,” in
Proceedings of the 18th International Conference on
Microelectronics, Dhahran, Saudi Arabia, Dec. 1719,
2006

M. A. Karami and
A. AfzaliKusha,
“Exponentially Tapering Ground Wires for Elmore Delay
Reduction in OnChip Interconnects,” in Proceedings of
the 18th International Conference on Microelectronics,
Dhahran, Saudi Arabia, Dec. 1719, 2006

A. Mehran, A. Khademzadeh,
A.
AfzaliKusha, and B. Shirpour, “A Heuristic Energy
Aware Application Mapping Algorithm for Network on
Chip,” in Proceedings of IP Based SoC Design Conference
& Exhibition, Grenoble, France, Dec. 67, 2006, pp.
289294.

F. Aezinia,
A. AfzaliKusha,
and C. Lucas, “Optimizing High Speed FlipFlop Using
Genetic Algorithm,” in Proceedings of the IEEE Asia
Pacific Conference on Circuits and Systems, Singapore,
Dec. 47, 2006, pp. 17891792.

F. Aezinia, S. Najafzadeh, and
A. AfzaliKusha, “Novel High Speed and Low Power
Single and Double EdgeTriggered FlipFlops,” in
Proceedings of the IEEE Asia Pacific Conference on
Circuits and Systems, Singapore, Dec. 47, 2006, pp.
14131416.

N. Honarmand and
A.
AfzaliKusha, “Low Power Combinational Multiplier
Using Data driven Signal Gating,” in Proceedings of the
IEEE Asia Pacific Conference on Circuits and Systems,
Singapore, Dec. 47, 2006, pp. 14561459.

M. NazmBojnordi, N. MoezziMadani,
M. Semsarzade, and A. AfzaliKusha, “An Efficient
Clocking Scheme for OnChip Communications,” in
Proceedings of the IEEE Asia Pacific Conference on
Circuits and Systems, Singapore, Dec. 47, 2006, pp.
119122.

P. Saeedi, A. FarmahiniFarahani,
M. Hamzeh, and A. AfzaliKusha, “NetworkonChip
ThermalBalanced Mapping,” in Proceedings of
International Design and Test (IDT) Workshop, Dubai,
U.A.E., November 1921, 2006.

M. Daneshtalab, S. Mohammadi,
A.
AfzaliKusha, and O. Fatemi, “Minimizing Hot Spots
in NoCs through a Dynamic Routing Algorithm based on
Input and Output Selections,” in Proceedings of the
International Symposium on SystemonChip, Tampere,
Finland, Nov. 1416, 2006, pp. 4952.

M. Saneei,
A. AfzaliKusha,
and Z. Navabi, “Serial Bus Encoding for Low Power
Application,” in Proceedings of the International
Symposium on SystemonChip, Tampere, Finland, Nov.
1416, 2006, pp. 99102.

M. Najibi, M. Salehi,
A.
AfzaliKusha, M. Pedram, S.M. Fakhraie, and H.
Pedram “Dynamic Voltage and Frequency Management Based
on Variable Update Intervals for Frequency Setting,” in
Proceedings of the IEEE/ACM International Conference on
Computer Aided Design, San Jose, CA, Nov. 1014, 2006.

M. Daneshtalab, A. Pedram,
A.
AfzaliKusha, and Siamak Mohammadi, “A New Fair
Dynamic Routing Algorithm for Avoiding Hot Spots in NoCs,”
in Proceedings of International Symposium on
Communications and Information Technologies, Bangkok,
Thailand, October 1830, 2006.

M. Daneshtalab, A. Sobhani,
A.
AfzaliKusha, O. Fatemi, and Z. Navabi, “NoC Hot
Spot Minimization Using AntNet Dynamic Routing
Algorithm,” in Proceedings of the IEEE 17th
International Conference on Applicationspecific
Systems, Architectures and Processors, Steamboat
Springs, Colorado, September 1113, 2006, pp. 3338.

A. Sobhani, M. Daneshtalab, M. H.
Neishaburi, M. D. Mottaghi, A. AfzaliKusha, O.
Fatemi, and Z. Navabi, “Dynamic Routing Algorithm for
Avoiding Hot Spots in Onchip Networks,” in Proceedings
of the IEEE International Conference on Design & Test
Integrated Systems in Nanoscale Technology, Tunis,
Tunisia, Sept. 57, 2006, pp. 179183.

M. Daneshtalab, A. Sobhani, M. D.
Mottaghi, A. AfzaliKusha, Z. Navabi, and O.
Fatemi, “Ant Colony Based Routing Architecture for
Minimizing Hot Spots in NOCs,” in Proceedings of the
19th Annual Symposium on Integrated Circuits and Systems
Design, 2006, Ouro Preto, Brazil, Aug. 28 – Sept. 01,
2006, pp. 5661.

M. D. Mottaghi,
A. AfzaliKusha,
and Z. Navabi, “ByZFAD: A Low Switching Activity
Architecture for ShiftandAdd Multipliers,” in
Proceedings of the 19th Annual Symposium on Integrated
Circuits and Systems Design, 2006, Ouro Preto, Brazil,
Aug. 28 – Sept. 01, 2006, pp. 179183.

A.R. Aminlou, M.M. Khafaji, V.
Moalemi, and A. AfzaliKusha, “A LowPower
LowVoltage Full Adder Cell using Latched XORXNOR,” in
Proceedings of 3rd International Conference on Circuits
and Systems for Communications, Bucharest, Romania, July
67, 2006, pp 1518.

A. S. Seyedi,
S. H. Rasouli, A. Amirabadi, A. AfzaliKusha, and
C. Lucas, “Design of Domino Logic Circuits by an
Optimization Method,” in Proceedings of Mixed Design
of Integrated Circuits and Systems, Gdynia, Poland,
2224 June 2006.

A.R.
Saberkari, A. AfzaliKusha, and S.
BaradaranShokouhi, “Design of a LowPower LowVoltage
1bit Adder Cell Using GDI Technique,” in Proceedings
of 14th Iranian Conference on Electrical Engineering,
Tehran, Iran, May 1618, 2006.

S.G.
Razavipour, S.A. Motamedi, and A. AfzaliKusha,
“LowPower HighSpeed SRAM Cell for LowePower
Applications,” in Proceedings of 14th Iranian
Conference on Electrical Engineering, Tehran, Iran,
May 1618, 2006.

M. Salehi,
M. Najibi, H. Pedram,
A. AfzaiKusha,
and S.M. Fakhraei, “Implementation of DVFM Control
System for Processor Power Reduction,” in Proceedings of 14th Iranian Conference on Electrical
Engineering, Tehran, Iran, May 1618, 2006.

A. Amirabadi,
A. Chehelcheraghi, S. H. Rasouli, A. Seyedi, and A.
AfzaiKusha, “Low Power and High Performance
Clock Delayed Domino Logic using Saturated Keeper in sub
100nm Technologies,” in Proceedings of 14th Iranian
Conference on Electrical Engineering, Tehran, Iran,
May 1618, 2006.

A. S. Seyedi,
S. H. Rasouli, A. Amirabadi, and A. AfzaliKusha,
“Genetic Algorithm Method for Design of Domino Logic
Circuits,” in Proceedings of 14th Iranian Conference
on Electrical Engineering, Tehran, Iran, May 1618,
2006.

H.
ParandehAfshar, A. AfzaliKusha, and
A. Khakifirooz
“A Very High Performance Address BUS Encoder,” in Proceedings of 2005 IEEE International Symposium on
Circuits and Systems, Island of Kos, Greece, May
2124, 2006, pp. 173117324.

N. Honarmand,
M.R.Javaheri, N.SedaghatiMokhtari and A.
AfzaliKusha, “Power Efficient Sequential
Multiplication Using Precomputation,” in Proceedings
of 2005 IEEE International Symposium on Circuits and
Systems, Island of Kos, Greece, May 2124, 2006, pp.
27092712.

B.
KheradmandBoroujeni, F. Aezinia, and A. AfzaliKusha,
“High Performance Circuit Techniques for Dynamic OR
Gates,” in Proceedings of 2005 IEEE International
Symposium on Circuits and Systems, Island of Kos,
Greece, May 2124, 2006, pp. 36623666.

S. Mehrmanesh, B.
Eghbalkhah, S. Saeedi, A. AfzaliKusha, and M.
Atarodi “A Compact Low Power MixedSignal
Equalizer for Gigabit Ethernet Applications,” in Proceedings of 2005 IEEE International Symposium on
Circuits and Systems, Island of Kos, Greece, May
2124, 2006, pp. 51675170.

G.
Razavipour, A. Motamedi, and A. AfzaliKusha,
“WLVC SRAM: A Low Leakage Memory Circuit for Deep
SubMicron Design,” in Proceedings of 2005 IEEE
International Symposium on Circuits and Systems,
Island of Kos, Greece, May 2124, 2006, pp. 22372240.

M.
Riazati, A. Sobhani, M. MottaghiDastjerdi, A.
AfzaliKusha, and
A. Khakifirooz,
“LowPower Multiplier with Static Decision for Input
Manipulation,” in Proceedings of 2005 IEEE
International Symposium on Circuits and Systems,
Island of Kos, Greece, May 2124, 2006, pp. 27212724.

M Saneei, A AfzaliKusha, and Z Navabi, “Lowpower and
Lowlatency Cluster Topology for Local Traffic NoCs,” in
Proceedings of 2005 IEEE International Symposium on
Circuits and Systems, Island of Kos, Greece, May
2124, 2006, pp. 17271730.

A. S. Seyedi,
S. H. Rasouli, A. Amirabadi, and A. AfzaliKusha,
“Low Power Low Leakage Clock Gated Static Pulsed
FlipFlop,” in Proceedings of 2005 IEEE International
Symposium on Circuits and Systems, Island of Kos,
Greece, May 2124, 2006, pp. 36583661.

A. Amirabadi,
A. Chehelcheraghi, S. H. Rasouli, A. Seyedi, and A.
AfzaiKusha, “Low Power and High Performance
Clock Delayed Domino Logic using Saturated Keeper,” in
Proceedings of 2005 IEEE International Symposium on
Circuits and Systems, Island of Kos, Greece, May
2124, 2006, pp. 31733176.

Masood
Dehyadgari, Mohsen Nickray, Ali AfzaliKusha, and
Zainalabedin Navabi, “A New Protocol Stack Model for
Network on Chip,” in the Proceedings of IEEE Computer
Society Annual Symposium on Emerging VLSI Technologies
and Architectures, March 2006, Germany, pp. 440 – 441.

A. S. Seyedi, S. H. Rasouli. A.
Amirabadi, and A. AfzaliKusha,
“Clock Gated Static Pulsed FlipFlop (CGSPFF) in Sub 100
nm Technology,” in the Proceedings of IEEE Computer
Society Annual Symposium on Emerging VLSI Technologies
and Architectures, March 2006, Germany, pp. 373 – 377.

S. H.
Rasouli, A. Amirabadi, A. S. Seyedi, and A.
AfzaliKusha, “Double Edge Triggered Feedback
flipflop in Sub 100nm Technology,” in the Proceedings
of Asia and South Pacific Conference on Design
Automation, 2006, Japan, pp. 297 – 302.

P. Hashemi,
J. Derakhshandeh, S. Mohajerzadeh, M.D. Robertson, J.C.
Bennett, A. ShayanArani, and A. AfzaliKusha,
“Characterization of Low Temperature StressInduced
Crystallization of aSi on Flexible Glass Substrate by
Transmission Electron Microscopy and Raman
Spectroscopy,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 326329.

M.
NazmBojnordi, M. Semsarzadeh, A. Banaiyan, and Ali
AfzaliKusha, “A Simple, LowCost and LowPower
Switch Architecture for NoCs,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 194197.

M.
Dehyadgari, M. Nickray, A. AfzaliKusha, and Z.
Navabi, “Evaluation of Pseudo Adaptive XY Routing Using
an Object Oriented Model for NOC,” in Proceedings of the
17^{th} International Conference on
Microelectronics, Islamabad, Pakistan, December 1315,
2005, pp. 204208.

M.
Dehyadgari, M. Nickray, A. Sobhani, and A.
AfzaliKusha, “Multiplier for Correlative Input
Patterns,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 7274.

V.
Majidzadeh, S. M. Alavi, and A. AfzaliKusha,
“Design of Merged Differential Cascode Voltage Switch
with PassGate (MDCVSPG) Logic for HighPerformance
Digital Systems,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 6366.

B.
KheradmandBoroujeni, A. Seyyedi, and A. AfzaliKusha,
“High Speed Low Gate Leakage Large CapacitiveLoad
Driver Circuits for LowVoltage CMOS,” in Proceedings of
the 17^{th} International Conference on
Microelectronics, Islamabad, Pakistan, December 1315,
2005, pp. 3035.

B.
KheradmandBoroujeni, K. Shojaee, and A. AfzaliKusha,
“Design and Simulated Annealing Optimization of a Static
Comparator for LowPower HighSpeed CMOS VLSI,” in
Proceedings of the 17^{th} International
Conference on Microelectronics, Islamabad, Pakistan,
December 1315, 2005, pp. 355359.

B.
KheradmandBoroujeni and A. AfzaliKusha, “A New
Static High FanIn ORNOR Gate Structure Suitable for
Low Power CMOS VLSI,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 102105.

A. Amirabadi,
Y. Mortazavi, and A. AfzaliKusha, “An Efficient
Forward Biasing Body Bias Generator for Clock Delayed
Domino Logic,” in Proceedings of the 17^{th}
International Conference on Microelectronics, Islamabad,
Pakistan, December 1315, 2005, pp. 1318.

M.
Dehyadgari, M. Nickray, and A. AfzaliKusha,
“Power and Delay Optimization for Network on Chip,” in
Proceedings of European Conference on Circuit Theory and
Design (ECCTD’05), Ireland, 2005, pp. III277–III281.

M.
Dehyadgari, M. Nickray, and A. AfzaliKusha, “Low
Power Communication for Network on Chip,” in Proceedings
of International Symposium on Telecommunications
(IST’05), Shiraz, Iran, 2005, pp. 521525.

M. Saneei,
A. AfzaliKusha, and Z. Navabi, “Sign
Bit Reduction Encoding For Low Power Applications,”
in Proceedings of 15^{th} Design Automation
Conference, Anaheim, U.S.A., June 2005, pp. 213217.

A. Abbasian,
M. TaherzadehSani, B. Amelifard, and A. AfzaliKusha,
“Modeling
of MOS Transistors Based on Genetic Algorithm and
Simulated Annealing,” in Proceedings of 2005
IEEE International Symposium on Circuits and Systems,
Kobe, Japan, May 2326, 2005, pp. 62186221.

B. Afzal, A. AfzaliKusha, and M. El Nokali, “Efficient
Power Model for Crossbar Interconnects,” in
2005 Proceedings of IEEE International Symposium on
Circuits and Systems, Kobe, Japan, May 2326, 2005,
pp. 58585861.

B. Amelifard,
A. AfzaliKusha, and A. Khademzadeh, “Enhancing
the Efficiency of Cluster Voltage Scaling Technique for
Lowpower Applications,” in Proceedings of
2005 IEEE International Symposium on Circuits and
Systems, Kobe, Japan, May 2326, 2005, pp.
16661669.

A.
Amirabadi, Y. Mortazavi, N. MoezziMadani, A.
AfzaliKusha, and M. Nourani, “Domino
Logic with an Efficient Variable Threshold Voltage
Keeper,” in Proceedings of 2005 IEEE
International Symposium on Circuits and Systems,
Kobe, Japan, May 2326, 2005, pp. 16741677.

M.
Gholipour, K. Shojaee, A. AfzaliKusha, A.
Khademzadeh, and M. Nourani, “An
Efficient Model for Performance Analysis of Asynchronous
Pipeline Design,” in Proceedings of 2005 IEEE
International Symposium on Circuits and Systems,
Kobe, Japan, May 2326, 2005, pp. 52365239.

S. Hatami,
M. Alisafaee, E. Atoofian, Z. Navabi, and A.
AfzaliKusha, “A LowPower ScanPath Architecture,”
in 2005 IEEE International Symposium on Circuits and
Systems, Kobe, Japan, May 2326, 2005, pp.
52785281.

A.
Amirabadi, Y. Mortazavi, and A. AfzaliKusha,
“Clock Delayed Domino Logic with an Efficient Variable
Voltage Keeper Threshold,” in Proceedings of 13th
Iranian Conference on Electrical Engineering,
Zanjan, Iran, May 1012, pp. 416420.

R.
SafaIsini, Gh.
Razavipour,
and A. AfzaliKusha, “A
SelfControllable Voltage Level Circuit with Body
Biasing for Low Power Applications,” in Proceedings of 13th Iranian Conference on Electrical
Engineering, Zanjan, Iran, May 1012, 2005, pp.
167171.

S. Toofan,
A. AfzaliKusha, A. AleAhmad, and A. Rahmati
“New
Current Mode Amplifier for LowPower LowVoltage SRAMs
in Proceedings of 13th Iranian Conference on
Electrical Engineering, Zanjan, Iran, May 1012,
2005, pp. 109112.

A.A.
ShirazaiBeheshti, E. Rouhani, K. Abdi, and A.
AfzaliKusha, “Improved
AlphaPower Model For MOSFETs,” in Proceedings
of 13th Iranian Conference on Electrical Engineering,
Zanjan, Iran, May 1012, 2005, pp. 7984.

M. Nickray,
M. Dehyadgari, A. Sobhani, and A. AfzaliKusha, “LPPM:
Low Power Partitioned Multiplier,” in Proceedings of 13th Iranian Conference on Electrical
Engineering, Zanjan, Iran, May 1012, 2005.

V.
Majidzadeh, S. M. Alavi, and A. AfzaliKusha, “Design
of Merged Differential Cascade Voltage Switch with
PassGate (MDCVSPG) Logic for HighPerformance Digital
Systems,” in Proceedings of 13th Iranian
Conference on Electrical Engineering, Zanjan, Iran,
May 1012, 2005.

B. Afzal and
A. AfzaliKusha, “Speed
Improvement of 16×16 Multipliers using Sizing
Optimization by Genetic Algorithm,” in Proceedings of 13th Iranian Conference on Electrical
Engineering, Zanjan, Iran, May 1012, 2005, pp.
130134.

B. Afzal and
A. AfzaliKusha, “Optimized
Design of Wallace Tree in Direct Form Block by Genetic
Algorithm,” in Proceedings of 13th Iranian
Conference on Electrical Engineering, Zanjan, Iran,
May 1012, 2005, pp. 321325.

S. Sharifi,
J. Jaffari, A. Hosseinabadi, A. AfzaliKusha, and
Z. Navabi, “Simultaneous Reduction of Dynamic and Static
Power in Scan Structures,” in Proceedings of the 15^{th}
Design, Automation and Test in Europe, 711 March,
Munich, Germany, 2005, pp. 846  851.

M.
Alisafaee, S. Hatami, E. Atoofian, Z. Navabi and A.
AfzaliKusha, “Architecture of a Data
Compressionbased Lowpower Scanpath,” in Proceedings
of the 16^{th} International Conference on
Microelectronics, Tunis, Tunisia, December 68, 2004,
pp. 768771.

M. Saneei,
A. AfzaliKusha, and Z. Navabi, “A Low Power
Technique Based on Sign Bit Reduction,” in Proceedings
of the 16^{th} International Conference on
Microelectronics, Tunis, Tunisia, December 68, 2004,
pp. 497500.

A. Amirabadi,
Y. Mortazavi, and A. AfzaliKusha, “Optimizing
LowPower HighSpeed Full Adders With Simulated
Annealing,” in Proceedings of the 16^{th}
International Conference on Microelectronics, Tunis,
Tunisia, December 68, pp. 429432, 2004.

J. Jaffari
and A. AfzaliKusha, “New DualThreshold Voltage
Assignment Technique for LowPower Digital Circuits,” in
Proceedings of the 16^{th} International
Conference on Microelectronics, Tunis, Tunisia, December
68, pp. 413416, 2004.

M.
Gholipour, K. Shojaee, A. Khademzadeh, A.
AfzaliKusha, and M. Nourani, “Performance and Power
Analysis of Asynchronous Pipeline Design Methods,” in
Proceedings of the 16^{th} International
Conference on Microelectronics, Tunis, Tunisia, December
68, pp. 409412, 2004.

P. Hashemi,
A. Behnam, E. Fathi, and A. AfzaliKusha,
“TwoDimensional Analytical Modeling and Simulation of
the Potential and Threshold Voltage of a New Fully
Depleted Dual Metal Gate SOI MESFET,” in Proceedings of
the 16^{th} International Conference on
Microelectronics, Tunis, Tunisia, December 68, pp.
372375, 2004.

M.
TaherzadehSani, A. Abbasian, B. Amelifard, and A.
AfzaliKusha, “MOS Compact IV Modeling with
Variable Accuracy Based on Genetic Algorithm and
Simulated Annealing,” in Proceedings of the 16^{th}
International Conference on Microelectronics, Tunis,
Tunisia, December 68, pp. 364367, 2004.

B. Afzal and
A. AfzaliKusha “Power Estimation of Crossbar
Interconnects Using Fully Analytical Approach,” in
Proceedings of the 16^{th} International
Conference on Microelectronics, Tunis, Tunisia, December
68, pp. 219222, 2004.

J. Jaffari
and A. AfzaliKusha, “A Novel Technique for
Reducing Leakage Current of VLSI Combinational
Circuits,” in Proceedings of the 16^{th}
International Conference on Microelectronics, Tunis,
Tunisia, December 68, pp. 207210, 2004.

N.
MoezziMadani, B. Tavassoli, A. Behnam, and A.
AfzaliKusha, “Study of Super CutOff CMOS Technique
in Presence of the Gate Leakage Current,” in Proceedings
of the 16^{th} International Conference on
Microelectronics, Tunis, Tunisia, December 68, pp.
2427, 2004.

F. Farbiz,
A. Behnam, M. Emadi, B. Esfandiarpoor, and A.
AfzaliKusha, “Voltage and Sizing Optimization for
Low Power Buffered Digital Designs,” in Proceedings
of the 16^{th} International Conference on
Microelectronics, Tunis, Tunisia, December 68, pp.
2023, 2004.

M. H.
Tehranipour, M. Nourani, K. Arabi and A. AfzaliKusha,
“Mixed RLHuffman Encoding for Power Reduction and Data
Compression in Scan Test,” in Proceedings of 2004
IEEE International Symposium on Circuits and Systems,
Vancouver, Canada, May 2326, pp. II681II684, 2004.

A. Abbasian,
S. Hatami, A. AfzaliKusha, M. Nourani, and C.
Lucas “EventDriven Dynamic Power management Based on
Wavelet Forecasting Theory,” in Proceedings of 2004
IEEE International Symposium on Circuits and Systems,
Vancouver, Canada, May 2326, pp. V325V328, 2004.

A.
Abbasian, S. Hatami, A. AfzaliKusha, C. Lucas,
and M.R. Zamani, “Wavelet Based Dynamic Power
Management for Nonstationary Service Requests,” in the
Proceedings of 12th Iranian Conference on Electrical
Engineering, Mashhad, Iran, May 1113, 2004, vol. 1, pp.
226231.

B. Afzal, E.
Fathi, A.L. Baghestani, A. AfzaliKusha, and M.
Nourani, “Power Estimation of Crossbar Interconnect
using Fully Analytical Approach,” in the Proceedings of
12th Iranian Conference on Electrical Engineering,
Mashhad, Iran, May 1113, 2004, vol. 1, pp. 192197.

A. Zahabi, Y. Koolivand, A. AfzaliKusha,
and M. Nourani,
“Area and Power Optimization Method for HighSpeed Dual
VT Domino Logic with Noise Constraint,” in the
Proceedings of 12th Iranian Conference on Electrical
Engineering, Mashhad, Iran, May 1113, 2004, vol. 1, pp.
103108.

J. Jafari,
A. Amirabadi, and A. AfzaliKusha, “A Novel
Technique for Reducing Subthreshold Current of VLSI
Combinational Circuits,” in the Proceedings of 12th
Iranian Conference on Electrical Engineering, Mashhad,
Iran, May 1113, 2004, vol. 1, pp. 163167.

A.
Amirabadi, R.A. Tousi, J. Jafari, and A.
AfzaliKusha, “Leakage Current Reduction by New
Technique in Standby Mode,” in the Proceedings of 12th
Iranian Conference on Electrical Engineering, Mashhad,
Iran, May 1113, 2004, vol. 1, pp. 4651.

S. H.
Rasouli, A. AfzaliKusha, A. Khademzadeh, and M. Nourani, “Double Edge Triggered Modified
Hybrid Latch Flipflop (DMHLFF),” in the Proceedings of
12th Iranian Conference on Electrical Engineering,
Mashhad, Iran, May1113, 2004, vol. 1, pp. 139144.

S.H. Rasouli,
A. AfzaliKusha, A. Khademzadeh, M.H. Tehranipour,
M. Nourani “A New Test Pattern Generator by Altering the
Structure of 2D LFSR for Builtin Self Test
Applications,” in the Proceedings of 12th Iranian
Conference on Electrical Engineering, Mashhad, Iran, May
1113, 2004, vol. 1, pp. 259264.

D.
Shahrjerdi, B. Hekmatshoar, A. AfzaliKusha, and
A Khakifirooz, “Optimization of the VTControl Method
for LowPower UltraThin DoubleGate SOI Logic
Circuits,” in Proceedings of The 2004 Great Lakes
Symposium on VLSI (GLSVLSI’04), pp. 236239, April
2628, 2004, Boston, Massachusetts, U.S.A.

A.
Amirabadi, J. Jafari, A. AfzaliKusha, M.
Nourani, and A. Khakifirooz, “Leakage Current Reduction
by New Technique in Standby Mode,” in Proceedings of The
2004 Great Lakes Symposium on VLSI (GLSVLSI’04), pp.
158161, April 2628, 2004, Boston, Massachusetts,
U.S.A.

R. Dehghani,
S.M. Atarodi, B. Bornoosh, and A. Afzali Kusha,
“A Reduced Complexity 3rd Order Digital DeltaSigma
Modulator for FractionalN Frequency Synthesis,” in
Proceedings of the 17th International Conference on VLSI
Design, January 0509, 2004, pp. 615618, Mumbai, India.

A. Abbasian,
A.M. NasriNasr Abadi, and A. AfzaliKusha, “Modular
Energy Recycling Differential Logic (MERDL) for Low
Power Applications,” in Proceedings of 10^{th}
IEEE International Conference on Electronics, Circuits
and Systems, Dec. 1417, 2003, pp. 312315, Sharjah,
United Arab Emirates, 2003.

A. Abbasian
and A. AfzaliKusha, “Pipeline Eventdriven
Norace Charge Recycling Logic (PENCL) for Low Power
Applications,” in Proceedings of 10^{th} IEEE
International Conference on Electronics, Circuits and
Systems, Dec. 1417, 2003, pp. 220223, Sharjah, United
Arab Emirates, 2003.

S. H.
Rasouli, A. AfzaliKusha, A. Khademzadeh, and M.
Nourani, “LowRace Splitlevel ChargeRecycling
PassTransistor Logic (LSCPL) for Low Power High Speed
Applications,” in Proceedings of the 15^{th}
International Conference on Microelectronics, Dec. 911,
2003, Cairo, Egypt, pp. 243246, 2003.

H. R.
Bahrami, A.M. NasriNasrabadi, S.H.R. Jamali,
and A.
AfzaliKusha, “Manipulation of Antenna Correlation
for the Capacity Enhancement in MIMO Communication
Systems,” in Proceedings of 2003 Australian
Telecommunications, Networks and Applications Conference
(ATNAC), December 810, 2003, Melbourne, Australia.

A.M. NasriNasrabadi, H.R.
Bahrami, S.H.R. Jamali,
and A. AfzaliKusha,
“Effect of Antenna Separation on Capacity and
Performance of MIMO Systems,” in Proceedings of 2003
Australian Telecommunications, Networks and Applications
Conference (ATNAC), December 810, 2003, Melbourne,
Australia.

B.
Hekmatshoar, D. Shahrjerdi, S. Mohajerzadeh, A.
Khakifirooz, M. Robertson, and A. AfzaliKusha,
“StressAssisted Copperinduced Lateral Growth of
Polycrystalline Germanium,” in Proceedings of 2003 MRS
Fall Meeting, vol. 795, pp. 199204, December 15,
Boston, MA, 2003.

E. Atoofian,
S. Hatami, Z. Navabi, M. Alisafaee, and A.
AfzaliKusha, “A New LowPower ScanPath
Architecture,” IEEE 4^{th} Workshop on RTL and
High Level Testing, pp. 9195, November 2021, 2003,
XI’AN, China.

M. Naderi,
B. Javadi, H. Pedram, A. AfzaliKusha, and M. K.
Akbari, “An Asynchronous ViterbiDecoder for LowPower
Applications”, in Proceedings of International Workshop
on Power and Timing Modeling, Optimization and
Simulation (PATMOS 2003), Torino, Italy, September
1012, pp. 471480, Italy, Sep. 2003.

M. H.
Tehranipour, M. Nourani, S. M. Fakhraie, and A.
AfzaliKusha, “Systematic Test Program Generation
for SoC Testing Using Embedded Processor,” in
Proceedings of 2003 IEEE International Symposium on
Circuits and Systems, pp. V541V544, Bangkok, Thailand,
May 2528, 2003.

M. Yavari,
O. Shoaei, and A. AfzaliKusha, “A Very
LowVoltage, LowPower and High Resolution SigmaDelta
Modulator for Digital Audio in 0.25mm
CMOS,” in Proceedings of 2003 IEEE International
Symposium on Circuits and Systems, pp. I1045I1048,
Bangkok, Thailand, May 2528, 2003.

A. Abbasian,
S.H. Rasouli, A. AfzaliKusha, and M. Nourani,
“Norace Pass Transistor Logic (NCRPL) for Low Power
Applications,” in Proceedings of 2003 IEEE International
Symposium on Circuits and Systems, pp. V289V292,
Bangkok, Thailand, May 2528, 2003.

B. Amelifard,
M. TaherzadehSani, H. ImanEini, and A. AfzaliKusha,
“Delay and Power Estimation of CMOS Inverters,” in
Proceedings of 11th Iranian Conference on Electrical
Engineering, Shiraz, May 68, 2003, vol. 1, pp. 458464.

H. ImanEini,
M. TaherzadehSani, B. Amelifard, and A. AfzaliKusha,
“Reducing CMOS Gates to Equivalent Inverters Based on
Modified
nth
Power Law MOSFET Model,” in the Proceedings of 11th
Iranian Conference on Electrical Engineering, Shiraz,
Iran, May 68, 2003, vol. 1, pp. 452457.

T. Maleki,
B. Sadeghi, E. YousefNezhad, M. GhafouriFard, S.
MohajerZadeh, A. AfzaliKusha, and
E. AslSoleimani, “Nonisotropic etching of PET using
UV,” in the Proceedings of 11th Iranian Conference on
Electrical Engineering, Shiraz, Iran, May 68, 2003,
vol. 1, pp. 159166. (in Persian).

A. Abbasian,
S.H. Rasouli, A. AfzaliKusha, and A.
Khademzadeh, “MRFCPL: A new charge recycling logic with
no sensitivity to signal skew for lowpower
applications,” in the Proceedings of 11th Iranian
Conference on Electrical Engineering, Shiraz, Iran, May
68, 2003, vol. 1, pp. 2633. (in Persian).

M. Nourani, A. AfzaliKusha,
J. Carletta, and C.
Papachristou “Effect
of Don't Cares on SoC's Testability and Power,” in
Proceedings of 8^{th} Annual
International Computer Society of Iran Computer
Conference, Mashad, Iran, Feb. 2527, pp. 6067, 2003.

M.
TaherzadehSani, B. Amelifard, H. ImanEini, M.
Farazian, A. AfzaliKusha, and M. Nourani “A
simple yet accurate analytical method for reducing CMOS
gates to equivalent inverters,”
in Proceedings of the 2003 Southwest Symposium on
MixedSignal Design, Las Vegas, U.S.A., 2325 February,
pp. 116120, 2003.

M.
TaherzadehSani, B. Amelifard, H. ImanEini, F. Farbiz,
A. AfzaliKusha, and M. Nourani “Power and Delay
Estimation of CMOS Inverters Using Fully Analytical
Approach,” in
Proceedings of the 2003 Southwest Symposium on
MixedSignal Design, Las Vegas, U.S.A., 2325 February,
pp. 112115, 2003.

A. Abbasian,
S.H. Rasouli, J. Derakhshandeh, A. AfzaliKusha,
and M. Nourani “Racefree CMOS PASSgate Charge
Recycling Logic (FCPCL) For Low Power Applications,”
in Proceedings
of the 2003 Southwest Symposium on MixedSignal
Design, Las Vegas, U.S.A., 2325 February, 2003, pp.
8789, 2003.

S. Hatami, M.Y. Azizi, H.R.
Bahrami, D. Motavalizadeh and A. AfzaliKusha,
“SOI
MOSFET IV Characteristics Modeling by Neural Networks,”
in Proceedings of the 14^{th} International
Conference on Microelectronics, Beirut, Lebanon,
December 1113, pp. 114117, 2002.

M. Maddah,
S. Bolouki, A. AfzaliKusha, and M. ElNokali “A
Compact Modeling of Drain Current in PD/FD SOI MOSFETs,”
in Proceedings of the 14^{th} International
Conference on Microelectronics, Beirut, Lebanon,
December 1113, pp. 7578, 2002.

M. Nourani,
S. Nazarian, and A. AfzaliKusha, “A Parallel
Algorithm for Power Estimation at Gate Level,” in
Proceedings of the 45th IEEE International Midwest
Symposium on Circuits and Systems, Tulsa, Oklahoma,
August 47, 2002.

M.
Gholipour, A. AfzaliKusha, M. Nourani, and A.
Khademzadeh, “An Efficient Asynchronous Pipeline FIFO
for LowPower Applications,” in Proceedings of the 45th
IEEE International Midwest Symposium on Circuits and
Systems, Tulsa, Oklahoma, August 47, 2002.

M. Maddah,
A. AfzaliKusha, H. SoltanianZadeh, “Efficient
Medial Curve Extraction of Microvascular Structures in
Confocal Microscopy Images,” in Proceedings of
International Conference on Diagnostic Imaging and
Analysis, Shanghai, China, 1820 August, 2002.

M. Maddah,
A. AfzaliKushaa, H. SoltanianZadeh, “Fast
centerline extraction for quantification of vessels in
Confocal Microscopy images,” in Proceedings of 2002 IEEE
International Symposium on Biomedical Imaging,
Washington, D.C., 710 July, 2002.

H.
MahmoodiMeimand and A. AfzaliKusha, “Efficient
Power Clock Generation For Adiabatic Logic,” in
Proceedings of 2001 IEEE International Symposium on
Circuits and Systems, Sydney, Australia, May 69, 2001.

H.
MahmoodiMeimand and A. AfzaliKusha, “LowPower,
LowNoise Adder Design with Passtransistor Adiabatic
Logic,” in Proceedings of International Conference of
Microelectronics, Tehran, Iran, Oct. 31 Nov. 2, 2000.

S. M.J.
OkhovatAlavian, A. AfzaliKusha, and M. Kamarei,
“Intersubband Transitions in Different Structures of
ConductionBand Quantum Wells,” in Proceedings of
International Conference of Microelectronics, Tehran,
Iran, Oct. 31 Nov. 2, 2000.

H.
MahmoodiMeimand, A. AfzaliKusha, and M.
Nourani, “Efficiency of Adiabatic Logic for LowPower,
LowNoise VLSI,” in Proceedings of Midwest Symposium on
Circuits and Systems, Lansing, Michigan, August 2000.

M.R.
FamilKhodaei, A. AfzaliKushaa, and M.H.
Miranbeigi, “Simulation of the water vapor effect in
determining temperature tissue distribution under Nd:YAG
laser light using the MonteCarlo method and neural
network,” in Proceedings of the 7th Iranian Conference
on Electrical Engineering, Tehran, Iran, May 1999,
Biomedical Engineering Proceedings, pp. 4957. (in
Persian).

M.R.
FamilKhodaei, A. AfzaliKushaa, and M.H.
Miranbeigi, “Determining the suitable wavelength for the
treatment of PWS using the MonteCarlo simulation of the
laser light propagation in the tissue,” in Proceedings
of the 7th Iranain Conference on Electrical Engineering,
Tehran, Iran, May 1999, Biomedical Engineering
Proceedings, pp. 3340. (in Persian).

C.Y. Sung,
A. AfzaliKushaa, T.B. Norris, X. Zhang, and G.I.
Haddad, “Timeresolved femtosecond intersubband
relaxations and population inversion in stepped quantum
wells,” in Proceedings of Hot Carriers in
Semiconductors, July 31Aug. 4, 1995; Chicago, IL, USA.

X. Zhang,
G.I. Haddad, J.P. Sun, C.Y. Sung, A. AfzaliKushaa,
and T.B. Norris, “Population inversion in step quantum
wells at 10 mm wavelength,” in Proceedings of 53rd
Annual Device Research Conference, Charlottesville,
Virginia, June 1921, 1995.

A.
AfzaliKushaa and G.I. Haddad, “Lasers Based on
Intersubband Transitions in Quantum Wells,” (Keynote
Address), SPIE vol. 2397  Optoelectronic Integrated
Circuits Materials Physics and Devices, pp. 476494,
April 1995.

T.B. Norris,
C.Y. Sung, A. AfzaliKushaa, and G.I. Haddad,
“Intersubband Relaxation and Population Inversion in
Stepped Quantum Wells,” in Proceedings of Ultrafast and
Optoelectronics and Quantum Optoelectronics Conference,
Dana Point, California, March 1315, 1995.

X. Zhang, A. AfzaliKushaa, W.L. Chen, G. Munns, and G.I.
Haddad, “Absorption and Population Inversion in ptype
InGaAs Strained Layers Based on Intervalence Subband
Transitions at FIR Frequencies,” in Proceedings of 6th
International Conference on Infrared Physics, May
29June 3, 1994, Ticino, Switzerland.

A.
AfzaliKushaa, G.I. Haddad, and T.B. Norris,
“Optically Pumped Intersubband Lasers,” in Proceedings
of 1993 International Semiconductor Device Research
Symposium, December 13, 1993, Charlottesville,
Virginia.

X. Zhang, P.
Liao, A. AfzaliKushaa, and G.I. Haddad,
“Interband Absorption in ptype InGaAs at FIR
Frequencies,” in Proceedings of 1993 MRS Fall Meeting,
November 29December 2, 1993, Boston, Massachusetts.

A.
AfzaliKushaa, G.I. Haddad, and T.B. Norris, “On the
Feasibility of Intersubband Transition Lasers,” in
Proceedings of IEEE/Cornell Conference on Advanced
Concepts in High Speed Semiconductor Device and
Circuits, August 24, 1993, Ithica, New York.

A.
AfzaliKushaa, G.I. Haddad, and T.B. Norris, “THz
Sources Based on Intersubband Transitions in Quantum
Wells and Strained Layers,” in Proceedings of Fourth
International Symposium on Space Terahertz Technology,
March 30April 1, 1993, UCLA, Los Angeles, California.

M. ElNokali
and A. AfzaliKushaa, “A Subthreshold Model for
the Analysis of MOS IC's,” in Proceedings of Ninth
Biennial University/Government/Industry Microelectronics
Symposium, June 1214, 1991, Melbourne, Florida.

A.
AfzaliKushaa and M. ElNokali, “A CAD
Model for MOS Transistors Valid in All Regions of
Operation,” in Proceedings of 34th Midwest Symposium on
Circuit and System, May 1417, 1991, Monterey,
California.

A. AfzaliKushaa and M. ElNokali, “Issues Related to
the Modeling of MOS Transistors in Subthreshold,” in
Proceedings of 22nd Annual Pittsburgh Conference on
Modeling and Simulation, May 35, 1991, Pittsburgh,
Pennsylvania.
ALi
AfzaliKusha





